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Commit 7484b0aa authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Change GPU RAC hardware clockgating"

parents bd59654f fc6c084b

drivers/gpu/msm/adreno_a5xx.c

+4 −4
Original line number Original line Diff line number Diff line
@@ -1030,7 +1030,7 @@ static const struct kgsl_hwcg_reg a50x_hwcg_regs[] = { 
	{A5XX_RBBM_CLOCK_CNTL2_RB0, 0x00222222},

	{A5XX_RBBM_CLOCK_CNTL2_RB0, 0x00222222},

	{A5XX_RBBM_CLOCK_CNTL_CCU0, 0x00022220},

	{A5XX_RBBM_CLOCK_CNTL_CCU0, 0x00022220},

	{A5XX_RBBM_CLOCK_CNTL_RAC, 0x05522222},

	{A5XX_RBBM_CLOCK_CNTL_RAC, 0x05522222},

	{A5XX_RBBM_CLOCK_CNTL2_RAC, 0x00555555},

	{A5XX_RBBM_CLOCK_CNTL2_RAC, 0x00505555},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU0, 0x04040404},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU0, 0x04040404},

	{A5XX_RBBM_CLOCK_HYST_RAC, 0x07444044},

	{A5XX_RBBM_CLOCK_HYST_RAC, 0x07444044},

	{A5XX_RBBM_CLOCK_DELAY_RB_CCU_L1_0, 0x00000002},

	{A5XX_RBBM_CLOCK_DELAY_RB_CCU_L1_0, 0x00000002},
@@ -1087,7 +1087,7 @@ static const struct kgsl_hwcg_reg a510_hwcg_regs[] = { 
	{A5XX_RBBM_CLOCK_CNTL_CCU0, 0x00022220},

	{A5XX_RBBM_CLOCK_CNTL_CCU0, 0x00022220},

	{A5XX_RBBM_CLOCK_CNTL_CCU1, 0x00022220},

	{A5XX_RBBM_CLOCK_CNTL_CCU1, 0x00022220},

	{A5XX_RBBM_CLOCK_CNTL_RAC, 0x05522222},

	{A5XX_RBBM_CLOCK_CNTL_RAC, 0x05522222},

	{A5XX_RBBM_CLOCK_CNTL2_RAC, 0x00555555},

	{A5XX_RBBM_CLOCK_CNTL2_RAC, 0x00505555},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU0, 0x04040404},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU0, 0x04040404},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU1, 0x04040404},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU1, 0x04040404},

	{A5XX_RBBM_CLOCK_HYST_RAC, 0x07444044},

	{A5XX_RBBM_CLOCK_HYST_RAC, 0x07444044},
@@ -1178,7 +1178,7 @@ static const struct kgsl_hwcg_reg a530_hwcg_regs[] = { 
	{A5XX_RBBM_CLOCK_CNTL_CCU2, 0x00022220},

	{A5XX_RBBM_CLOCK_CNTL_CCU2, 0x00022220},

	{A5XX_RBBM_CLOCK_CNTL_CCU3, 0x00022220},

	{A5XX_RBBM_CLOCK_CNTL_CCU3, 0x00022220},

	{A5XX_RBBM_CLOCK_CNTL_RAC, 0x05522222},

	{A5XX_RBBM_CLOCK_CNTL_RAC, 0x05522222},

	{A5XX_RBBM_CLOCK_CNTL2_RAC, 0x00555555},

	{A5XX_RBBM_CLOCK_CNTL2_RAC, 0x00505555},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU0, 0x04040404},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU0, 0x04040404},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU1, 0x04040404},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU1, 0x04040404},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU2, 0x04040404},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU2, 0x04040404},
@@ -1274,7 +1274,7 @@ static const struct kgsl_hwcg_reg a540_hwcg_regs[] = { 
	{A5XX_RBBM_CLOCK_CNTL_CCU2, 0x00022220},

	{A5XX_RBBM_CLOCK_CNTL_CCU2, 0x00022220},

	{A5XX_RBBM_CLOCK_CNTL_CCU3, 0x00022220},

	{A5XX_RBBM_CLOCK_CNTL_CCU3, 0x00022220},

	{A5XX_RBBM_CLOCK_CNTL_RAC, 0x05522222},

	{A5XX_RBBM_CLOCK_CNTL_RAC, 0x05522222},

	{A5XX_RBBM_CLOCK_CNTL2_RAC, 0x00555555},

	{A5XX_RBBM_CLOCK_CNTL2_RAC, 0x00505555},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU0, 0x04040404},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU0, 0x04040404},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU1, 0x04040404},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU1, 0x04040404},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU2, 0x04040404},

	{A5XX_RBBM_CLOCK_HYST_RB_CCU2, 0x04040404},