Coresight: ETMv4: Prevent TRCRSCTLR0&1 from being accessed

1. TRCRSCTLRn - Resource Selection Control Registers n=0~1 are reserved,
   we shouldn't access them.
2. The max number of 'n' here is defined in TRCIDR4.NUMRSPAIR whoes value
   indicates the number of resource selection *pairs*, and 0 indicates
   one resource selection pair, 1 indicates two pairs, and so on ...

So, the total number of resource selection control registers which we can
access is (TRCIDR4.NUMRSPAIR * 2)

Change-Id: Ib063469bf574976b76dc0d2b6ad0d3718a02162d
Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Git-commit: 497b59565b25d6dd2441bc483f3811ee27a0c7b0
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git


Signed-off-by: Shashank Mittal <mittals@codeaurora.org>