Loading arch/arm/boot/dts/qcom/msmtitanium-cpu.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -54,6 +54,7 @@ enable-method = "qcom,titanium-arm-cortex-acc"; qcom,acc = <&acc0>; qcom,limits-info = <&mitigation_profile0>; qcom,ea = <&ea0>; next-level-cache = <&L2_0>; L2_0: l2-cache { compatible = "arm,arch-cache"; Loading @@ -69,6 +70,7 @@ reg = <0x1>; qcom,acc = <&acc1>; qcom,limits-info = <&mitigation_profile1>; qcom,ea = <&ea1>; next-level-cache = <&L2_0>; }; Loading @@ -79,6 +81,7 @@ reg = <0x2>; qcom,acc = <&acc2>; qcom,limits-info = <&mitigation_profile2>; qcom,ea = <&ea2>; next-level-cache = <&L2_0>; }; Loading @@ -89,6 +92,7 @@ reg = <0x3>; qcom,acc = <&acc3>; qcom,limits-info = <&mitigation_profile3>; qcom,ea = <&ea3>; next-level-cache = <&L2_0>; }; Loading @@ -99,6 +103,7 @@ reg = <0x100>; qcom,acc = <&acc4>; qcom,limits-info = <&mitigation_profile4>; qcom,ea = <&ea4>; next-level-cache = <&L2_1>; L2_1: l2-cache { compatible = "arm,arch-cache"; Loading @@ -114,6 +119,7 @@ reg = <0x101>; qcom,acc = <&acc5>; qcom,limits-info = <&mitigation_profile5>; qcom,ea = <&ea5>; next-level-cache = <&L2_1>; }; Loading @@ -124,6 +130,7 @@ reg = <0x102>; qcom,acc = <&acc6>; qcom,limits-info = <&mitigation_profile6>; qcom,ea = <&ea6>; next-level-cache = <&L2_1>; }; Loading @@ -134,6 +141,7 @@ reg = <0x103>; qcom,acc = <&acc7>; qcom,limits-info = <&mitigation_profile7>; qcom,ea = <&ea7>; next-level-cache = <&L2_1>; }; }; Loading arch/arm/boot/dts/qcom/msmtitanium.dtsi +40 −0 Original line number Diff line number Diff line Loading @@ -468,6 +468,46 @@ }; }; qcom,msm-core@a0000 { compatible = "qcom,apss-core-ea"; reg = <0xa0000 0x1000>; qcom,low-hyst-temp = <10>; qcom,high-hyst-temp = <5>; qcom,polling-interval = <50>; ea0: ea0 { sensor = <&sensor_information9>; }; ea1: ea1 { sensor = <&sensor_information10>; }; ea2: ea2 { sensor = <&sensor_information11>; }; ea3: ea3 { sensor = <&sensor_information12>; }; ea4: ea4 { sensor = <&sensor_information4>; }; ea5: ea5 { sensor = <&sensor_information5>; }; ea6: ea6 { sensor = <&sensor_information6>; }; ea7: ea7 { sensor = <&sensor_information7>; }; }; blsp1_uart0: serial@78af000 { compatible = "qcom,msm-lsuart-v14"; reg = <0x78af000 0x200>; Loading Loading
arch/arm/boot/dts/qcom/msmtitanium-cpu.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -54,6 +54,7 @@ enable-method = "qcom,titanium-arm-cortex-acc"; qcom,acc = <&acc0>; qcom,limits-info = <&mitigation_profile0>; qcom,ea = <&ea0>; next-level-cache = <&L2_0>; L2_0: l2-cache { compatible = "arm,arch-cache"; Loading @@ -69,6 +70,7 @@ reg = <0x1>; qcom,acc = <&acc1>; qcom,limits-info = <&mitigation_profile1>; qcom,ea = <&ea1>; next-level-cache = <&L2_0>; }; Loading @@ -79,6 +81,7 @@ reg = <0x2>; qcom,acc = <&acc2>; qcom,limits-info = <&mitigation_profile2>; qcom,ea = <&ea2>; next-level-cache = <&L2_0>; }; Loading @@ -89,6 +92,7 @@ reg = <0x3>; qcom,acc = <&acc3>; qcom,limits-info = <&mitigation_profile3>; qcom,ea = <&ea3>; next-level-cache = <&L2_0>; }; Loading @@ -99,6 +103,7 @@ reg = <0x100>; qcom,acc = <&acc4>; qcom,limits-info = <&mitigation_profile4>; qcom,ea = <&ea4>; next-level-cache = <&L2_1>; L2_1: l2-cache { compatible = "arm,arch-cache"; Loading @@ -114,6 +119,7 @@ reg = <0x101>; qcom,acc = <&acc5>; qcom,limits-info = <&mitigation_profile5>; qcom,ea = <&ea5>; next-level-cache = <&L2_1>; }; Loading @@ -124,6 +130,7 @@ reg = <0x102>; qcom,acc = <&acc6>; qcom,limits-info = <&mitigation_profile6>; qcom,ea = <&ea6>; next-level-cache = <&L2_1>; }; Loading @@ -134,6 +141,7 @@ reg = <0x103>; qcom,acc = <&acc7>; qcom,limits-info = <&mitigation_profile7>; qcom,ea = <&ea7>; next-level-cache = <&L2_1>; }; }; Loading
arch/arm/boot/dts/qcom/msmtitanium.dtsi +40 −0 Original line number Diff line number Diff line Loading @@ -468,6 +468,46 @@ }; }; qcom,msm-core@a0000 { compatible = "qcom,apss-core-ea"; reg = <0xa0000 0x1000>; qcom,low-hyst-temp = <10>; qcom,high-hyst-temp = <5>; qcom,polling-interval = <50>; ea0: ea0 { sensor = <&sensor_information9>; }; ea1: ea1 { sensor = <&sensor_information10>; }; ea2: ea2 { sensor = <&sensor_information11>; }; ea3: ea3 { sensor = <&sensor_information12>; }; ea4: ea4 { sensor = <&sensor_information4>; }; ea5: ea5 { sensor = <&sensor_information5>; }; ea6: ea6 { sensor = <&sensor_information6>; }; ea7: ea7 { sensor = <&sensor_information7>; }; }; blsp1_uart0: serial@78af000 { compatible = "qcom,msm-lsuart-v14"; reg = <0x78af000 0x200>; Loading