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Commit 6ed87c5b authored by Tarun Kanti DebBarma's avatar Tarun Kanti DebBarma
Browse files

gpio/omap: further cleanup using wkup_en register 



Wakeup enable register offset initialized according to OMAP versions
during device registration. Use this to avoid version checks.
Starting with OMAP4, legacy registers should not be used in combination
with the updated regsiters. Use wkup_en register consistently for
all SoCs wherever applicable.

Signed-off-by: default avatarTarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: default avatarCharulatha V <charu@ti.com>
Reviewed-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: default avatarTony Lindgren <tony@atomide.com>
Reviewed-by: default avatarKevin Hilman <khilman@ti.com>
Signed-off-by: default avatarKevin Hilman <khilman@ti.com>
parent c8eef65a

arch/arm/mach-omap1/gpio16xx.c

+1 −0
Original line number Diff line number Diff line
@@ -89,6 +89,7 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = { 
	.irqenable	= OMAP1610_GPIO_IRQENABLE1,

	.set_irqenable	= OMAP1610_GPIO_SET_IRQENABLE1,

	.clr_irqenable	= OMAP1610_GPIO_CLEAR_IRQENABLE1,

	.wkup_en	= OMAP1610_GPIO_WAKEUPENABLE,

};



static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {

arch/arm/mach-omap2/gpio.c

+2 −0
Original line number Diff line number Diff line
@@ -89,6 +89,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) 
		pdata->regs->debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;

		pdata->regs->debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;

		pdata->regs->ctrl = OMAP24XX_GPIO_CTRL;

		pdata->regs->wkup_en = OMAP24XX_GPIO_WAKE_EN;

		break;

	case 2:

		pdata->bank_type = METHOD_GPIO_44XX;
@@ -106,6 +107,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) 
		pdata->regs->debounce = OMAP4_GPIO_DEBOUNCINGTIME;

		pdata->regs->debounce_en = OMAP4_GPIO_DEBOUNCENABLE;

		pdata->regs->ctrl = OMAP4_GPIO_CTRL;

		pdata->regs->wkup_en = OMAP4_GPIO_IRQWAKEN0;

		break;

	default:

		WARN(1, "Invalid gpio bank_type\n");

arch/arm/plat-omap/include/plat/gpio.h

+1 −0
Original line number Diff line number Diff line
@@ -189,6 +189,7 @@ struct omap_gpio_reg_offs { 
	u16 debounce;

	u16 debounce_en;

	u16 ctrl;

	u16 wkup_en;



	bool irqenable_inv;

};

drivers/gpio/gpio-omap.c

+21 −89
Original line number Diff line number Diff line
@@ -51,9 +51,7 @@ struct gpio_bank { 
	u16 virtual_irq_start;

	int method;

	u32 suspend_wakeup;

#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)

	u32 saved_wakeup;

#endif

	u32 non_wakeup_gpios;

	u32 enabled_non_wakeup_gpios;

	struct gpio_regs context;
@@ -598,30 +596,15 @@ static int omap_gpio_request(struct gpio_chip *chip, unsigned offset) 
static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)

{

	struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);

	void __iomem *base = bank->base;

	unsigned long flags;



	spin_lock_irqsave(&bank->lock, flags);

#ifdef CONFIG_ARCH_OMAP16XX

	if (bank->method == METHOD_GPIO_1610) {

		/* Disable wake-up during idle for dynamic tick */

		void __iomem *reg = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;

		__raw_writel(1 << offset, reg);

	}

#endif

#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)

	if (bank->method == METHOD_GPIO_24XX) {

		/* Disable wake-up during idle for dynamic tick */

		void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA;

		__raw_writel(1 << offset, reg);

	}

#endif

#ifdef CONFIG_ARCH_OMAP4

	if (bank->method == METHOD_GPIO_44XX) {



	if (bank->regs->wkup_en)

		/* Disable wake-up during idle for dynamic tick */

		void __iomem *reg = bank->base + OMAP4_GPIO_IRQWAKEN0;

		__raw_writel(1 << offset, reg);

	}

#endif

		_gpio_rmw(base, bank->regs->wkup_en, 1 << offset, 0);



	bank->mod_usage &= ~(1 << offset);



	if (bank->regs->ctrl && !bank->mod_usage) {
@@ -1071,8 +1054,8 @@ omap_mpuio_alloc_gc(struct gpio_bank *bank, unsigned int irq_start, 
	ct->chip.irq_mask = irq_gc_mask_set_bit;

	ct->chip.irq_unmask = irq_gc_mask_clr_bit;

	ct->chip.irq_set_type = gpio_irq_type;

	/* REVISIT: assuming only 16xx supports MPUIO wake events */

	if (cpu_is_omap16xx())



	if (bank->regs->wkup_en)

		ct->chip.irq_set_wake = gpio_wake_enable,



	ct->regs.mask = OMAP_MPUIO_GPIO_INT / bank->stride;
@@ -1101,6 +1084,7 @@ static void __devinit omap_gpio_chip_init(struct gpio_bank *bank) 
	if (bank_is_mpuio(bank)) {

		bank->chip.label = "mpuio";

#ifdef CONFIG_ARCH_OMAP16XX

		if (bank->regs->wkup_en)

			bank->chip.dev = &omap_mpuio_device.dev;

#endif

		bank->chip.base = OMAP_MPUIO(0);
@@ -1212,50 +1196,24 @@ err_exit: 
	return ret;

}



#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)

static int omap_gpio_suspend(void)

{

	struct gpio_bank *bank;



	if (!cpu_class_is_omap2() && !cpu_is_omap16xx())

		return 0;



	list_for_each_entry(bank, &omap_gpio_list, node) {

		void __iomem *base = bank->base;

		void __iomem *wake_status;

		void __iomem *wake_clear;

		void __iomem *wake_set;

		unsigned long flags;



		switch (bank->method) {

#ifdef CONFIG_ARCH_OMAP16XX

		case METHOD_GPIO_1610:

			wake_status = bank->base + OMAP1610_GPIO_WAKEUPENABLE;

			wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;

			wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;

			break;

#endif

#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)

		case METHOD_GPIO_24XX:

			wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;

			wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;

			wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;

			break;

#endif

#ifdef CONFIG_ARCH_OMAP4

		case METHOD_GPIO_44XX:

			wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0;

			wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;

			wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;

			break;

#endif

		default:

			continue;

		}

		if (!bank->regs->wkup_en)

			return 0;



		wake_status = bank->base + bank->regs->wkup_en;



		spin_lock_irqsave(&bank->lock, flags);

		bank->saved_wakeup = __raw_readl(wake_status);

		__raw_writel(0xffffffff, wake_clear);

		__raw_writel(bank->suspend_wakeup, wake_set);

		_gpio_rmw(base, bank->regs->wkup_en, 0xffffffff, 0);

		_gpio_rmw(base, bank->regs->wkup_en, bank->suspend_wakeup, 1);

		spin_unlock_irqrestore(&bank->lock, flags);

	}
@@ -1266,40 +1224,16 @@ static void omap_gpio_resume(void) 
{

	struct gpio_bank *bank;



	if (!cpu_class_is_omap2() && !cpu_is_omap16xx())

		return;



	list_for_each_entry(bank, &omap_gpio_list, node) {

		void __iomem *wake_clear;

		void __iomem *wake_set;

		void __iomem *base = bank->base;

		unsigned long flags;



		switch (bank->method) {

#ifdef CONFIG_ARCH_OMAP16XX

		case METHOD_GPIO_1610:

			wake_clear = bank->base + OMAP1610_GPIO_CLEAR_WAKEUPENA;

			wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;

			break;

#endif

#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)

		case METHOD_GPIO_24XX:

			wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;

			wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;

			break;

#endif

#ifdef CONFIG_ARCH_OMAP4

		case METHOD_GPIO_44XX:

			wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;

			wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;

			break;

#endif

		default:

			continue;

		}

		if (!bank->regs->wkup_en)

			return;



		spin_lock_irqsave(&bank->lock, flags);

		__raw_writel(0xffffffff, wake_clear);

		__raw_writel(bank->saved_wakeup, wake_set);

		_gpio_rmw(base, bank->regs->wkup_en, 0xffffffff, 0);

		_gpio_rmw(base, bank->regs->wkup_en, bank->saved_wakeup, 1);

		spin_unlock_irqrestore(&bank->lock, flags);

	}

}
@@ -1309,8 +1243,6 @@ static struct syscore_ops omap_gpio_syscore_ops = { 
	.resume		= omap_gpio_resume,

};



#endif



#ifdef CONFIG_ARCH_OMAP2PLUS



static void omap_gpio_save_context(struct gpio_bank *bank);