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Commit 64dc47db authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "coresight: add STM driver support in upstream implementation"

parents 01ea8794 5ebe8c23
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+8 −0
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@@ -58,4 +58,12 @@ config CORESIGHT_SOURCE_ETM3X
	  which allows tracing the instructions that a processor is executing
	  This is primarily useful for instruction level tracing.  Depending
	  the ETM version data tracing may also be available.

config CORESIGHT_STM
	bool "CoreSight System Trace Macrocell driver"
	depends on CORESIGHT_LINKS_AND_SINKS
	help
	  This driver provides support for hardware assisted software
	  instrumentation based tracing. This is primarily useful for
	  logging useful software events or data.
endif
+1 −0
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@@ -9,3 +9,4 @@ obj-$(CONFIG_CORESIGHT_SINK_ETBV10) += coresight-etb10.o
obj-$(CONFIG_CORESIGHT_LINKS_AND_SINKS) += coresight-funnel.o \
					   coresight-replicator.o
obj-$(CONFIG_CORESIGHT_SOURCE_ETM3X) += coresight-etm3x.o coresight-etm-cp14.o
obj-$(CONFIG_CORESIGHT_STM) += coresight-stm.o
+23 −1
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/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
/* Copyright (c) 2011-2012, 2016 The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
@@ -33,6 +33,7 @@

#define TIMEOUT_US		100
#define BMVAL(val, lsb, msb)	((val & GENMASK(msb, lsb)) >> lsb)
#define BVAL(val, n)		((val & BIT(n)) >> n)

static inline void CS_LOCK(void __iomem *addr)
{
@@ -52,6 +53,27 @@ static inline void CS_UNLOCK(void __iomem *addr)
	} while (0);
}

static inline bool coresight_authstatus_enabled(void __iomem *addr)
{
	int ret;
	unsigned auth_val;

	if (!addr)
		return false;

	auth_val = readl_relaxed(addr + CORESIGHT_AUTHSTATUS);

	if ((0x2 == BMVAL(auth_val, 0, 1)) ||
	    (0x2 == BMVAL(auth_val, 2, 3)) ||
	    (0x2 == BMVAL(auth_val, 4, 5)) ||
	    (0x2 == BMVAL(auth_val, 6, 7)))
		ret = false;
	else
		ret = true;

	return ret;
}

#ifdef CONFIG_CORESIGHT_SOURCE_ETM3X
extern int etm_readl_cp14(u32 off, unsigned int *val);
extern int etm_writel_cp14(u32 off, u32 val);
+906 −0

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@@ -43,6 +43,13 @@

extern struct bus_type coresight_bustype;

enum coresight_clk_rate {
	CORESIGHT_CLK_RATE_OFF,
	CORESIGHT_CLK_RATE_TRACE = 1000,
	CORESIGHT_CLK_RATE_HSTRACE = 2000,
	CORESIGHT_CLK_RATE_FIXED = 3000,
};

enum coresight_dev_type {
	CORESIGHT_DEV_TYPE_NONE,
	CORESIGHT_DEV_TYPE_SINK,