ARM: dts: msm: Program only L2 and L3 ACC SEL settings for msm8996

According to the latest hardware guidelines, only L2 and L3 cache
HMSS ACC settings need to be programmed based upon the level of
their voltage supplies. Update the apc0_pwrcl and apc1_perfcl mem_acc
regulator devices to adhere to this requirement.

Change-Id: I94032f6fbe5920a8d446c58c763afa29705e527a
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>