Loading arch/arm/boot/dts/qcom/mdm9640.dtsi +1 −2 Original line number Diff line number Diff line Loading @@ -648,12 +648,11 @@ <&clock_gcc clk_gcc_sys_noc_usb3_axi_clk>, <&clock_gcc clk_gcc_usb30_mock_utmi_clk>, <&clock_gcc clk_gcc_usb30_sleep_clk>, <&clock_gcc clk_ln_bb_clk>, <&clock_gcc clk_cxo_dwc3_clk>, <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>; clock-names = "core_clk", "iface_clk", "utmi_clk", "sleep_clk", "ref_clk", "xo", "cfg_ahb_clk"; "xo", "cfg_ahb_clk"; dwc3@8a00000 { compatible = "synopsys,dwc3"; Loading arch/arm/boot/dts/qcom/mdmcalifornium-usb.dtsi +1 −2 Original line number Diff line number Diff line Loading @@ -50,12 +50,11 @@ <&clock_gcc clk_gcc_sys_noc_usb3_axi_clk>, <&clock_gcc clk_gcc_usb30_mock_utmi_clk>, <&clock_gcc clk_gcc_usb30_sleep_clk>, <&clock_gcc clk_ln_bb_clk>, <&clock_gcc clk_cxo_dwc3_clk>, <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>; clock-names = "core_clk", "iface_clk", "utmi_clk", "sleep_clk", "ref_clk", "xo", "cfg_ahb_clk"; "xo", "cfg_ahb_clk"; dwc3@8a00000 { compatible = "snps,dwc3"; Loading arch/arm/boot/dts/qcom/msm8996.dtsi +1 −2 Original line number Diff line number Diff line Loading @@ -1993,11 +1993,10 @@ <&clock_gcc clk_gcc_periph_noc_usb20_ahb_clk>, <&clock_gcc clk_gcc_usb20_mock_utmi_clk>, <&clock_gcc clk_gcc_usb20_sleep_clk>, <&clock_gcc clk_ln_bb_clk>, <&clock_gcc clk_cxo_dwc3_clk>, <&clock_gcc clk_gcc_usb_phy_cfg_ahb2phy_clk>; clock-names = "core_clk", "iface_clk", "utmi_clk", "sleep_clk", "ref_clk", "xo", "cfg_ahb_clk"; "xo", "cfg_ahb_clk"; dwc3@7600000 { compatible = "snps,dwc3"; Loading Loading
arch/arm/boot/dts/qcom/mdm9640.dtsi +1 −2 Original line number Diff line number Diff line Loading @@ -648,12 +648,11 @@ <&clock_gcc clk_gcc_sys_noc_usb3_axi_clk>, <&clock_gcc clk_gcc_usb30_mock_utmi_clk>, <&clock_gcc clk_gcc_usb30_sleep_clk>, <&clock_gcc clk_ln_bb_clk>, <&clock_gcc clk_cxo_dwc3_clk>, <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>; clock-names = "core_clk", "iface_clk", "utmi_clk", "sleep_clk", "ref_clk", "xo", "cfg_ahb_clk"; "xo", "cfg_ahb_clk"; dwc3@8a00000 { compatible = "synopsys,dwc3"; Loading
arch/arm/boot/dts/qcom/mdmcalifornium-usb.dtsi +1 −2 Original line number Diff line number Diff line Loading @@ -50,12 +50,11 @@ <&clock_gcc clk_gcc_sys_noc_usb3_axi_clk>, <&clock_gcc clk_gcc_usb30_mock_utmi_clk>, <&clock_gcc clk_gcc_usb30_sleep_clk>, <&clock_gcc clk_ln_bb_clk>, <&clock_gcc clk_cxo_dwc3_clk>, <&clock_gcc clk_gcc_usb_phy_cfg_ahb_clk>; clock-names = "core_clk", "iface_clk", "utmi_clk", "sleep_clk", "ref_clk", "xo", "cfg_ahb_clk"; "xo", "cfg_ahb_clk"; dwc3@8a00000 { compatible = "snps,dwc3"; Loading
arch/arm/boot/dts/qcom/msm8996.dtsi +1 −2 Original line number Diff line number Diff line Loading @@ -1993,11 +1993,10 @@ <&clock_gcc clk_gcc_periph_noc_usb20_ahb_clk>, <&clock_gcc clk_gcc_usb20_mock_utmi_clk>, <&clock_gcc clk_gcc_usb20_sleep_clk>, <&clock_gcc clk_ln_bb_clk>, <&clock_gcc clk_cxo_dwc3_clk>, <&clock_gcc clk_gcc_usb_phy_cfg_ahb2phy_clk>; clock-names = "core_clk", "iface_clk", "utmi_clk", "sleep_clk", "ref_clk", "xo", "cfg_ahb_clk"; "xo", "cfg_ahb_clk"; dwc3@7600000 { compatible = "snps,dwc3"; Loading