arm64: ARM: Fix the Generic Timers interrupt active level description

The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional
description" that generic timers provide an active-LOW interrupt
output. Fix the device trees to correctly describe this.

While doing this update the CPU mask to match the number of described
CPUs as well.

Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
(cherry picked from commit 6bc474de366155c19d69966b45a7c06b8e2a9837)
Signed-off-by: Kevin Hilman <khilman@linaro.org>