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Commit 5f1c64ce authored by Trilok Soni's avatar Trilok Soni
Browse files

Revert "arm64: gicv3: Insert barriers after SGI operations" 



This reverts commit 4507cc73 ("arm64: gicv3: Insert barriers after SGI operation"),
since the SGI barriers workaround is only needed for early 8996
parts.

CRs-Fixed: 960849
Change-Id: Ib946bd2ccd865aeb467b5d8cdc365fcda3b61e0b
Signed-off-by: default avatarTrilok Soni <tsoni@codeaurora.org>
parent 1468823d

drivers/irqchip/Kconfig

+0 −12
Original line number Original line Diff line number Diff line
@@ -89,18 +89,6 @@ config BRCMSTB_L2_IRQ 
	select GENERIC_IRQ_CHIP

	select GENERIC_IRQ_CHIP

	select IRQ_DOMAIN

	select IRQ_DOMAIN





config MSM_GIC_SGI_NEEDS_BARRIER

	bool "SGI operations require explicit barriers"

	depends on ARM_GIC_V3

	def_bool ARCH_MSMTHULIUM

	help

	  Some early samples of the MSMTHULIUM SoCs require that an explicit

	  barrier be executed between two sucessive writes to the ICC_SGI1R_EL1

	  register. If you are building the kernel to work on one of these early

	  designs, select 'Y' here.



	  For production kernels, you should say 'N' here.



config MSM_SHOW_RESUME_IRQ

config MSM_SHOW_RESUME_IRQ

	bool "Enable logging of interrupts that could have caused resume"

	bool "Enable logging of interrupts that could have caused resume"

	depends on ARM_GIC

	depends on ARM_GIC

drivers/irqchip/irq-gic-v3.c

+0 −10
Original line number Original line Diff line number Diff line
@@ -144,17 +144,7 @@ static void __maybe_unused gic_write_grpen1(u64 val) 




static void __maybe_unused gic_write_sgi1r(u64 val)

static void __maybe_unused gic_write_sgi1r(u64 val)

{

{

#ifdef CONFIG_MSM_GIC_SGI_NEEDS_BARRIER

	static DEFINE_RAW_SPINLOCK(sgi_lock);

	unsigned long flags;

	raw_spin_lock_irqsave(&sgi_lock, flags);

#endif



	asm volatile("msr_s " __stringify(ICC_SGI1R_EL1) ", %0" : : "r" (val));

	asm volatile("msr_s " __stringify(ICC_SGI1R_EL1) ", %0" : : "r" (val));

#ifdef CONFIG_MSM_GIC_SGI_NEEDS_BARRIER

	dsb(nsh);

	raw_spin_unlock_irqrestore(&sgi_lock, flags);

#endif

}

}





static void gic_enable_sre(void)

static void gic_enable_sre(void)