Loading arch/arm/boot/dts/qcom/msmtitanium.dtsi +27 −0 Original line number Diff line number Diff line Loading @@ -1174,6 +1174,33 @@ qcom,ce-opp-freq = <100000000>; }; qcom_seecom: qseecom@85b00000 { compatible = "qcom,qseecom"; reg = <0x85b00000 0x800000>; reg-names = "secapp-region"; qcom,hlos-num-ce-hw-instances = <1>; qcom,hlos-ce-hw-instance = <0>; qcom,qsee-ce-hw-instance = <0>; qcom,disk-encrypt-pipe-pair = <2>; qcom,support-fde; qcom,msm-bus,name = "qseecom-noc"; qcom,msm-bus,num-cases = <4>; qcom,msm-bus,num-paths = <1>; qcom,support-bus-scaling; qcom,msm-bus,vectors-KBps = <55 512 0 0>, <55 512 0 0>, <55 512 120000 1200000>, <55 512 393600 3936000>; clocks = <&clock_gcc clk_crypto_clk_src>, <&clock_gcc clk_gcc_crypto_clk>, <&clock_gcc clk_gcc_crypto_ahb_clk>, <&clock_gcc clk_gcc_crypto_axi_clk>; clock-names = "core_clk_src", "core_clk", "iface_clk", "bus_clk"; qcom,ce-opp-freq = <100000000>; }; qcom,ipc_router { compatible = "qcom,ipc_router"; qcom,node-id = <1>; Loading Loading
arch/arm/boot/dts/qcom/msmtitanium.dtsi +27 −0 Original line number Diff line number Diff line Loading @@ -1174,6 +1174,33 @@ qcom,ce-opp-freq = <100000000>; }; qcom_seecom: qseecom@85b00000 { compatible = "qcom,qseecom"; reg = <0x85b00000 0x800000>; reg-names = "secapp-region"; qcom,hlos-num-ce-hw-instances = <1>; qcom,hlos-ce-hw-instance = <0>; qcom,qsee-ce-hw-instance = <0>; qcom,disk-encrypt-pipe-pair = <2>; qcom,support-fde; qcom,msm-bus,name = "qseecom-noc"; qcom,msm-bus,num-cases = <4>; qcom,msm-bus,num-paths = <1>; qcom,support-bus-scaling; qcom,msm-bus,vectors-KBps = <55 512 0 0>, <55 512 0 0>, <55 512 120000 1200000>, <55 512 393600 3936000>; clocks = <&clock_gcc clk_crypto_clk_src>, <&clock_gcc clk_gcc_crypto_clk>, <&clock_gcc clk_gcc_crypto_ahb_clk>, <&clock_gcc clk_gcc_crypto_axi_clk>; clock-names = "core_clk_src", "core_clk", "iface_clk", "bus_clk"; qcom,ce-opp-freq = <100000000>; }; qcom,ipc_router { compatible = "qcom,ipc_router"; qcom,node-id = <1>; Loading