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Commit 5a6e55c4 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'mlx4' 



Or Gerlitz says:

====================
Mellanox driver updates

This patch set from Jack Morgenstein does the following:

1. Fix MAC/VLAN SRIOV implementation, and add wrapper functions for VLAN allocation
   and de-allocation (patches 1-6).

2. Implements resource quotas when running under SRIOV (patches 7-10).
   Patch 7 is a small bug fix, and patches 8-10 implement the quotas.

Quotas are implemented per resource type for VFs and the PF, to prevent
any entity from simply grabbing all the resources for itself and leaving
the other entities unable to obtain such resources.

The series is against net-next commit ba486502 "ipv6: remove the unnecessary statement in find_match()"

changes from V0:
 - dropped the 1st patch which needs to go to -stable and hence through net,
   not net-next
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 3b4c5cbf 146f3ef4

drivers/infiniband/hw/mlx4/main.c

+4 −4
Original line number Diff line number Diff line
@@ -177,18 +177,18 @@ static int mlx4_ib_query_device(struct ib_device *ibdev, 


	props->max_mr_size	   = ~0ull;

	props->page_size_cap	   = dev->dev->caps.page_size_cap;

	props->max_qp		   = dev->dev->caps.num_qps - dev->dev->caps.reserved_qps;

	props->max_qp		   = dev->dev->quotas.qp;

	props->max_qp_wr	   = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;

	props->max_sge		   = min(dev->dev->caps.max_sq_sg,

					 dev->dev->caps.max_rq_sg);

	props->max_cq		   = dev->dev->caps.num_cqs - dev->dev->caps.reserved_cqs;

	props->max_cq		   = dev->dev->quotas.cq;

	props->max_cqe		   = dev->dev->caps.max_cqes;

	props->max_mr		   = dev->dev->caps.num_mpts - dev->dev->caps.reserved_mrws;

	props->max_mr		   = dev->dev->quotas.mpt;

	props->max_pd		   = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;

	props->max_qp_rd_atom	   = dev->dev->caps.max_qp_dest_rdma;

	props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;

	props->max_res_rd_atom	   = props->max_qp_rd_atom * props->max_qp;

	props->max_srq		   = dev->dev->caps.num_srqs - dev->dev->caps.reserved_srqs;

	props->max_srq		   = dev->dev->quotas.srq;

	props->max_srq_wr	   = dev->dev->caps.max_srq_wqes - 1;

	props->max_srq_sge	   = dev->dev->caps.max_srq_sge;

	props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;

drivers/net/ethernet/mellanox/mlx4/cmd.c

+2 −1
Original line number Diff line number Diff line
@@ -1687,7 +1687,7 @@ static void mlx4_master_deactivate_admin_state(struct mlx4_priv *priv, int slave 
		vp_oper = &priv->mfunc.master.vf_oper[slave].vport[port];

		if (NO_INDX != vp_oper->vlan_idx) {

			__mlx4_unregister_vlan(&priv->dev,

					       port, vp_oper->vlan_idx);

					       port, vp_oper->state.default_vlan);

			vp_oper->vlan_idx = NO_INDX;

		}

		if (NO_INDX != vp_oper->mac_idx) {
@@ -1718,6 +1718,7 @@ static void mlx4_master_do_cmd(struct mlx4_dev *dev, int slave, u8 cmd, 
	if (cmd == MLX4_COMM_CMD_RESET) {

		mlx4_warn(dev, "Received reset from slave:%d\n", slave);

		slave_state[slave].active = false;

		slave_state[slave].old_vlan_api = false;

		mlx4_master_deactivate_admin_state(priv, slave);

		for (i = 0; i < MLX4_EVENT_TYPES_NUM; ++i) {

				slave_state[slave].event_eq[i].eqn = -1;

drivers/net/ethernet/mellanox/mlx4/en_netdev.c

+1 −5
Original line number Diff line number Diff line
@@ -417,7 +417,6 @@ static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, 
	struct mlx4_en_priv *priv = netdev_priv(dev);

	struct mlx4_en_dev *mdev = priv->mdev;

	int err;

	int idx;



	en_dbg(HW, priv, "Killing VID:%d\n", vid);
@@ -425,10 +424,7 @@ static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, 


	/* Remove VID from port VLAN filter */

	mutex_lock(&mdev->state_lock);

	if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx))

		mlx4_unregister_vlan(mdev->dev, priv->port, idx);

	else

		en_dbg(HW, priv, "could not find vid %d in cache\n", vid);

	mlx4_unregister_vlan(mdev->dev, priv->port, vid);



	if (mdev->device_up && priv->port_up) {

		err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);

drivers/net/ethernet/mellanox/mlx4/fw.c

+71 −28
Original line number Diff line number Diff line
@@ -177,6 +177,7 @@ int mlx4_QUERY_FUNC_CAP_wrapper(struct mlx4_dev *dev, int slave, 
				struct mlx4_cmd_mailbox *outbox,

				struct mlx4_cmd_info *cmd)

{

	struct mlx4_priv *priv = mlx4_priv(dev);

	u8	field;

	u32	size;

	int	err = 0;
@@ -185,18 +186,26 @@ int mlx4_QUERY_FUNC_CAP_wrapper(struct mlx4_dev *dev, int slave, 
#define QUERY_FUNC_CAP_NUM_PORTS_OFFSET		0x1

#define QUERY_FUNC_CAP_PF_BHVR_OFFSET		0x4

#define QUERY_FUNC_CAP_FMR_OFFSET		0x8

#define QUERY_FUNC_CAP_QP_QUOTA_OFFSET		0x10

#define QUERY_FUNC_CAP_CQ_QUOTA_OFFSET		0x14

#define QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET		0x18

#define QUERY_FUNC_CAP_MPT_QUOTA_OFFSET		0x20

#define QUERY_FUNC_CAP_MTT_QUOTA_OFFSET		0x24

#define QUERY_FUNC_CAP_MCG_QUOTA_OFFSET		0x28

#define QUERY_FUNC_CAP_QP_QUOTA_OFFSET_DEP	0x10

#define QUERY_FUNC_CAP_CQ_QUOTA_OFFSET_DEP	0x14

#define QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET_DEP	0x18

#define QUERY_FUNC_CAP_MPT_QUOTA_OFFSET_DEP	0x20

#define QUERY_FUNC_CAP_MTT_QUOTA_OFFSET_DEP	0x24

#define QUERY_FUNC_CAP_MCG_QUOTA_OFFSET_DEP	0x28

#define QUERY_FUNC_CAP_MAX_EQ_OFFSET		0x2c

#define QUERY_FUNC_CAP_RESERVED_EQ_OFFSET	0x30



#define QUERY_FUNC_CAP_QP_QUOTA_OFFSET		0x50

#define QUERY_FUNC_CAP_CQ_QUOTA_OFFSET		0x54

#define QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET		0x58

#define QUERY_FUNC_CAP_MPT_QUOTA_OFFSET		0x60

#define QUERY_FUNC_CAP_MTT_QUOTA_OFFSET		0x64

#define QUERY_FUNC_CAP_MCG_QUOTA_OFFSET		0x68



#define QUERY_FUNC_CAP_FMR_FLAG			0x80

#define QUERY_FUNC_CAP_FLAG_RDMA		0x40

#define QUERY_FUNC_CAP_FLAG_ETH			0x80

#define QUERY_FUNC_CAP_FLAG_QUOTAS		0x10



/* when opcode modifier = 1 */

#define QUERY_FUNC_CAP_PHYS_PORT_OFFSET		0x3
@@ -237,8 +246,9 @@ int mlx4_QUERY_FUNC_CAP_wrapper(struct mlx4_dev *dev, int slave, 
		MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP1_PROXY);



	} else if (vhcr->op_modifier == 0) {

		/* enable rdma and ethernet interfaces */

		field = (QUERY_FUNC_CAP_FLAG_ETH | QUERY_FUNC_CAP_FLAG_RDMA);

		/* enable rdma and ethernet interfaces, and new quota locations */

		field = (QUERY_FUNC_CAP_FLAG_ETH | QUERY_FUNC_CAP_FLAG_RDMA |

			 QUERY_FUNC_CAP_FLAG_QUOTAS);

		MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_FLAGS_OFFSET);



		field = dev->caps.num_ports;
@@ -250,14 +260,20 @@ int mlx4_QUERY_FUNC_CAP_wrapper(struct mlx4_dev *dev, int slave, 
		field = 0; /* protected FMR support not available as yet */

		MLX4_PUT(outbox->buf, field, QUERY_FUNC_CAP_FMR_OFFSET);



		size = dev->caps.num_qps;

		size = priv->mfunc.master.res_tracker.res_alloc[RES_QP].quota[slave];

		MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP_QUOTA_OFFSET);

		size = dev->caps.num_qps;

		MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_QP_QUOTA_OFFSET_DEP);



		size = dev->caps.num_srqs;

		size = priv->mfunc.master.res_tracker.res_alloc[RES_SRQ].quota[slave];

		MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET);

		size = dev->caps.num_srqs;

		MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET_DEP);



		size = dev->caps.num_cqs;

		size = priv->mfunc.master.res_tracker.res_alloc[RES_CQ].quota[slave];

		MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_CQ_QUOTA_OFFSET);

		size = dev->caps.num_cqs;

		MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_CQ_QUOTA_OFFSET_DEP);



		size = dev->caps.num_eqs;

		MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MAX_EQ_OFFSET);
@@ -265,14 +281,19 @@ int mlx4_QUERY_FUNC_CAP_wrapper(struct mlx4_dev *dev, int slave, 
		size = dev->caps.reserved_eqs;

		MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_RESERVED_EQ_OFFSET);



		size = dev->caps.num_mpts;

		size = priv->mfunc.master.res_tracker.res_alloc[RES_MPT].quota[slave];

		MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MPT_QUOTA_OFFSET);

		size = dev->caps.num_mpts;

		MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MPT_QUOTA_OFFSET_DEP);



		size = dev->caps.num_mtts;

		size = priv->mfunc.master.res_tracker.res_alloc[RES_MTT].quota[slave];

		MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MTT_QUOTA_OFFSET);

		size = dev->caps.num_mtts;

		MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MTT_QUOTA_OFFSET_DEP);



		size = dev->caps.num_mgms + dev->caps.num_amgms;

		MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MCG_QUOTA_OFFSET);

		MLX4_PUT(outbox->buf, size, QUERY_FUNC_CAP_MCG_QUOTA_OFFSET_DEP);



	} else

		err = -EINVAL;
@@ -287,7 +308,7 @@ int mlx4_QUERY_FUNC_CAP(struct mlx4_dev *dev, u32 gen_or_port, 
	u32			*outbox;

	u8			field, op_modifier;

	u32			size;

	int			err = 0;

	int			err = 0, quotas = 0;



	op_modifier = !!gen_or_port; /* 0 = general, 1 = logical port */
@@ -311,6 +332,7 @@ int mlx4_QUERY_FUNC_CAP(struct mlx4_dev *dev, u32 gen_or_port, 
			goto out;

		}

		func_cap->flags = field;

		quotas = !!(func_cap->flags & QUERY_FUNC_CAP_FLAG_QUOTAS);



		MLX4_GET(field, outbox, QUERY_FUNC_CAP_NUM_PORTS_OFFSET);

		func_cap->num_ports = field;
@@ -318,6 +340,7 @@ int mlx4_QUERY_FUNC_CAP(struct mlx4_dev *dev, u32 gen_or_port, 
		MLX4_GET(size, outbox, QUERY_FUNC_CAP_PF_BHVR_OFFSET);

		func_cap->pf_context_behaviour = size;



		if (quotas) {

			MLX4_GET(size, outbox, QUERY_FUNC_CAP_QP_QUOTA_OFFSET);

			func_cap->qp_quota = size & 0xFFFFFF;
@@ -327,12 +350,6 @@ int mlx4_QUERY_FUNC_CAP(struct mlx4_dev *dev, u32 gen_or_port, 
			MLX4_GET(size, outbox, QUERY_FUNC_CAP_CQ_QUOTA_OFFSET);

			func_cap->cq_quota = size & 0xFFFFFF;



		MLX4_GET(size, outbox, QUERY_FUNC_CAP_MAX_EQ_OFFSET);

		func_cap->max_eq = size & 0xFFFFFF;



		MLX4_GET(size, outbox, QUERY_FUNC_CAP_RESERVED_EQ_OFFSET);

		func_cap->reserved_eq = size & 0xFFFFFF;



			MLX4_GET(size, outbox, QUERY_FUNC_CAP_MPT_QUOTA_OFFSET);

			func_cap->mpt_quota = size & 0xFFFFFF;
@@ -341,6 +358,32 @@ int mlx4_QUERY_FUNC_CAP(struct mlx4_dev *dev, u32 gen_or_port, 


			MLX4_GET(size, outbox, QUERY_FUNC_CAP_MCG_QUOTA_OFFSET);

			func_cap->mcg_quota = size & 0xFFFFFF;



		} else {

			MLX4_GET(size, outbox, QUERY_FUNC_CAP_QP_QUOTA_OFFSET_DEP);

			func_cap->qp_quota = size & 0xFFFFFF;



			MLX4_GET(size, outbox, QUERY_FUNC_CAP_SRQ_QUOTA_OFFSET_DEP);

			func_cap->srq_quota = size & 0xFFFFFF;



			MLX4_GET(size, outbox, QUERY_FUNC_CAP_CQ_QUOTA_OFFSET_DEP);

			func_cap->cq_quota = size & 0xFFFFFF;



			MLX4_GET(size, outbox, QUERY_FUNC_CAP_MPT_QUOTA_OFFSET_DEP);

			func_cap->mpt_quota = size & 0xFFFFFF;



			MLX4_GET(size, outbox, QUERY_FUNC_CAP_MTT_QUOTA_OFFSET_DEP);

			func_cap->mtt_quota = size & 0xFFFFFF;



			MLX4_GET(size, outbox, QUERY_FUNC_CAP_MCG_QUOTA_OFFSET_DEP);

			func_cap->mcg_quota = size & 0xFFFFFF;

		}

		MLX4_GET(size, outbox, QUERY_FUNC_CAP_MAX_EQ_OFFSET);

		func_cap->max_eq = size & 0xFFFFFF;



		MLX4_GET(size, outbox, QUERY_FUNC_CAP_RESERVED_EQ_OFFSET);

		func_cap->reserved_eq = size & 0xFFFFFF;



		goto out;

	}

drivers/net/ethernet/mellanox/mlx4/main.c

+22 −10
Original line number Diff line number Diff line
@@ -562,13 +562,17 @@ static int mlx4_slave_cap(struct mlx4_dev *dev) 
	}



	dev->caps.num_ports		= func_cap.num_ports;

	dev->caps.num_qps		= func_cap.qp_quota;

	dev->caps.num_srqs		= func_cap.srq_quota;

	dev->caps.num_cqs		= func_cap.cq_quota;

	dev->quotas.qp			= func_cap.qp_quota;

	dev->quotas.srq			= func_cap.srq_quota;

	dev->quotas.cq			= func_cap.cq_quota;

	dev->quotas.mpt			= func_cap.mpt_quota;

	dev->quotas.mtt			= func_cap.mtt_quota;

	dev->caps.num_qps		= 1 << hca_param.log_num_qps;

	dev->caps.num_srqs		= 1 << hca_param.log_num_srqs;

	dev->caps.num_cqs		= 1 << hca_param.log_num_cqs;

	dev->caps.num_mpts		= 1 << hca_param.log_mpt_sz;

	dev->caps.num_eqs		= func_cap.max_eq;

	dev->caps.reserved_eqs		= func_cap.reserved_eq;

	dev->caps.num_mpts		= func_cap.mpt_quota;

	dev->caps.num_mtts		= func_cap.mtt_quota;

	dev->caps.num_pds               = MLX4_NUM_PDS;

	dev->caps.num_mgms              = 0;

	dev->caps.num_amgms             = 0;
@@ -2102,9 +2106,15 @@ static int __mlx4_init_one(struct pci_dev *pdev, int pci_dev_data) 
			"aborting.\n");

		return err;

	}

	if (num_vfs > MLX4_MAX_NUM_VF) {

		printk(KERN_ERR "There are more VF's (%d) than allowed(%d)\n",

		       num_vfs, MLX4_MAX_NUM_VF);



	/* Due to requirement that all VFs and the PF are *guaranteed* 2 MACS

	 * per port, we must limit the number of VFs to 63 (since their are

	 * 128 MACs)

	 */

	if (num_vfs >= MLX4_MAX_NUM_VF) {

		dev_err(&pdev->dev,

			"Requested more VF's (%d) than allowed (%d)\n",

			num_vfs, MLX4_MAX_NUM_VF - 1);

		return -EINVAL;

	}
@@ -2322,6 +2332,8 @@ slave_start: 
	if (err)

		goto err_steer;



	mlx4_init_quotas(dev);



	for (port = 1; port <= dev->caps.num_ports; port++) {

		err = mlx4_init_port_info(dev, port);

		if (err)