soc: qcom: Implement a workaround for the MX current spike

Change in PIL sequence to assert then MSS memory clamps before doing
MSS restart.

CRs-Fixed: 949533
Change-Id: Ibad2b957f90a1acacc648a91f8d75289a2d4821d
Signed-off-by: Puja Gupta <pujag@codeaurora.org>