Loading arch/arm/boot/dts/qcom/msmtitanium-gpu.dtsi +16 −0 Original line number Diff line number Diff line Loading @@ -11,6 +11,22 @@ */ &soc { pil_gpu: qcom,kgsl-hyp { compatible = "qcom,pil-tz-generic"; qcom,pas-id = <13>; qcom,firmware-name = "a506_zap"; memory-region = <&gpu_mem>; clocks = <&clock_gcc clk_gcc_crypto_clk>, <&clock_gcc clk_gcc_crypto_ahb_clk>, <&clock_gcc clk_gcc_crypto_axi_clk>, <&clock_gcc clk_crypto_clk_src>; clock-names = "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_core_clk_src"; qcom,proxy-clock-names = "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_core_clk_src"; qcom,scm_core_clk_src-freq = <80000000>; }; msm_bus: qcom,kgsl-busmon { label = "kgsl-busmon"; compatible = "qcom,kgsl-busmon"; Loading arch/arm/boot/dts/qcom/msmtitanium.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -86,6 +86,14 @@ reg = <0x0 0x90001000 0x0 0x13ff000>; label = "cont_splash_mem"; }; gpu_mem: gpu_region@0 { compatible = "shared-dma-pool"; reusable; alloc-ranges = <0x0 0x80000000 0x0 0x10000000>; alignment = <0 0x400000>; size = <0 0x800000>; }; }; aliases { Loading Loading
arch/arm/boot/dts/qcom/msmtitanium-gpu.dtsi +16 −0 Original line number Diff line number Diff line Loading @@ -11,6 +11,22 @@ */ &soc { pil_gpu: qcom,kgsl-hyp { compatible = "qcom,pil-tz-generic"; qcom,pas-id = <13>; qcom,firmware-name = "a506_zap"; memory-region = <&gpu_mem>; clocks = <&clock_gcc clk_gcc_crypto_clk>, <&clock_gcc clk_gcc_crypto_ahb_clk>, <&clock_gcc clk_gcc_crypto_axi_clk>, <&clock_gcc clk_crypto_clk_src>; clock-names = "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_core_clk_src"; qcom,proxy-clock-names = "scm_core_clk", "scm_iface_clk", "scm_bus_clk", "scm_core_clk_src"; qcom,scm_core_clk_src-freq = <80000000>; }; msm_bus: qcom,kgsl-busmon { label = "kgsl-busmon"; compatible = "qcom,kgsl-busmon"; Loading
arch/arm/boot/dts/qcom/msmtitanium.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -86,6 +86,14 @@ reg = <0x0 0x90001000 0x0 0x13ff000>; label = "cont_splash_mem"; }; gpu_mem: gpu_region@0 { compatible = "shared-dma-pool"; reusable; alloc-ranges = <0x0 0x80000000 0x0 0x10000000>; alignment = <0 0x400000>; size = <0 0x800000>; }; }; aliases { Loading