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Commit 57015421 authored by Greg Ungerer's avatar Greg Ungerer
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m68knommu: move UART addressing to part specific includes



The ColdFire UART base addresses varies between the different ColdFire
family members. Instead of keeping the base addresses with the UART
definitions keep them with the other addresses definitions for each
ColdFire part.

The motivation for this move is so that when we add new ColdFire
part definitions, they are all in a single file (and we shouldn't
normally need to modify the UART definitions in mcfuart.h at all).

Signed-off-by: default avatarGreg Ungerer <gerg@uclinux.org>
parent 733f31b7
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+9 −1
Original line number Diff line number Diff line
@@ -90,6 +90,14 @@
#define	MCFSIM_PADDR		(MCF_MBAR + 0x1c5)	/* Parallel Direction (r/w) */
#define	MCFSIM_PADAT		(MCF_MBAR + 0x1c9)	/* Parallel Port Value (r/w) */

#if defined(CONFIG_NETtel)
#define	MCFUART_BASE1		0x180		/* Base address of UART1 */
#define	MCFUART_BASE2		0x140		/* Base address of UART2 */
#else
#define	MCFUART_BASE1		0x140		/* Base address of UART1 */
#define	MCFUART_BASE2		0x180		/* Base address of UART2 */
#endif

/*
 *	Define system peripheral IRQ usage.
 */
+8 −1
Original line number Diff line number Diff line
@@ -100,6 +100,7 @@
#define MCFGPIO_PCLRR_UART		0xFC0A402A
#define MCFGPIO_PCLRR_FECH		0xFC0A402B
#define MCFGPIO_PCLRR_FECL		0xFC0A402C

/*
 * Generic GPIO support
 */
@@ -112,7 +113,6 @@
#define MCFGPIO_PIN_MAX			80
#define MCFGPIO_IRQ_MAX			8
#define MCFGPIO_IRQ_VECBASE		MCFINT_VECBASE
/****************************************************************************/

#define MCF_GPIO_PAR_UART                   (0xA4036)
#define MCF_GPIO_PAR_FECI2C                 (0xA4033)
@@ -128,6 +128,13 @@
#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2   (0x02)
#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2   (0x04)

/*
 *  UART module.
 */
#define MCFUART_BASE1		0x60000		/* Base address of UART1 */
#define MCFUART_BASE2		0x64000		/* Base address of UART2 */
#define MCFUART_BASE3		0x68000		/* Base address of UART2 */

/*
 *  Reset Controll Unit.
 */
+7 −0
Original line number Diff line number Diff line
@@ -52,6 +52,13 @@
#define	MCF_RCR_SWRESET		0x80		/* Software reset bit */
#define	MCF_RCR_FRCSTOUT	0x40		/* Force external reset */

/*
 *  UART module.
 */
#define MCFUART_BASE1		0x200           /* Base address of UART1 */
#define MCFUART_BASE2		0x240           /* Base address of UART2 */
#define MCFUART_BASE3		0x280           /* Base address of UART3 */

#define MCFGPIO_PODR_ADDR	(MCF_IPSBAR + 0x100000)
#define MCFGPIO_PODR_DATAH	(MCF_IPSBAR + 0x100001)
#define MCFGPIO_PODR_DATAL	(MCF_IPSBAR + 0x100002)
+5 −0
Original line number Diff line number Diff line
@@ -59,6 +59,11 @@
#define MCFSIM_DACR1		0x110		/* DRAM 1 Addr and Ctrl (r/w) */
#define MCFSIM_DMR1		0x114		/* DRAM 1 Mask reg (r/w) */

/*
 *	UART module.
 */
#define MCFUART_BASE1		0x1c0           /* Base address of UART1 */
#define MCFUART_BASE2		0x200           /* Base address of UART2 */

/*
 *	Some symbol defines for the above...
+3 −0
Original line number Diff line number Diff line
@@ -65,6 +65,9 @@
#define	MCFSIM_DCMR1		0x5c		/* DRAM 1 Mask reg (r/w) */
#define	MCFSIM_DCCR1		0x63		/* DRAM 1 Control reg (r/w) */

#define	MCFUART_BASE1		0x100		/* Base address of UART1 */
#define	MCFUART_BASE2		0x140		/* Base address of UART2 */

#define	MCFSIM_PACNT		(MCF_MBAR + 0x80) /* Port A Control (r/w) */
#define	MCFSIM_PADDR		(MCF_MBAR + 0x84) /* Port A Direction (r/w) */
#define	MCFSIM_PADAT		(MCF_MBAR + 0x86) /* Port A Data (r/w) */
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