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Commit 733f31b7 authored by Greg Ungerer's avatar Greg Ungerer
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m68knommu: fix clock rate value reported for ColdFire 54xx parts 



The instruction timings of the ColdFire 54xx family parts are
different to other version 4 parts (or version 2 or 3 parts for
that matter too).

Move the instruction timing setting into the ColdFire part
specific headers, and set the 54xx value appropriately.

Signed-off-by: default avatarGreg Ungerer <gerg@uclinux.org>
parent 7fc82b65

arch/m68k/include/asm/m5206sim.h

+2 −1
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
/****************************************************************************/



#define	CPU_NAME		"COLDFIRE(m5206)"

#define	CPU_INSTR_PER_JIFFY	3



/*

 *	Define the 5206 SIM register set addresses.

arch/m68k/include/asm/m520xsim.h

+2 −1
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 
/****************************************************************************/



#define	CPU_NAME		"COLDFIRE(m520x)"

#define	CPU_INSTR_PER_JIFFY	3



/*

 *  Define the 520x SIM register set addresses.

arch/m68k/include/asm/m523xsim.h

+2 −1
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 
/****************************************************************************/



#define	CPU_NAME		"COLDFIRE(m523x)"

#define	CPU_INSTR_PER_JIFFY	3



/*

 *	Define the 523x SIM register set addresses.

arch/m68k/include/asm/m5249sim.h

+2 −1
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 
/****************************************************************************/



#define	CPU_NAME		"COLDFIRE(m5249)"

#define	CPU_INSTR_PER_JIFFY	3



/*

 *	Define the 5249 SIM register set addresses.

arch/m68k/include/asm/m5272sim.h

+2 −1
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
/****************************************************************************/



#define	CPU_NAME		"COLDFIRE(m5272)"

#define	CPU_INSTR_PER_JIFFY	3



/*

 *	Define the 5272 SIM register set addresses.