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Commit 535409d9 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'tegra-for-3.10-dt' of... 

Merge tag 'tegra-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt2

From Stephen Warren <swarren@wwwdotorg.org>:

ARM: tegra: device tree changes

This branch contains the majority of the device tree changes for Tegra.
Highlights include:

* Many changes for Tegra114, and the Dalmore board, to enable pinctrl,
  SDHCI/MMC, PWM, DMA, I2C, KBC, SPI, battery, regulators.
* Adding or enabling suspend wakeup sources on many boards, and adding
  suspend timing parameters, to support the system suspend patches.
* Adding clocks to the audio-related nodes, so that in 3.11, the audio
  driver can pull these clocks from device tree rather than hard-coding
  clock names.
* Some small DT fixes/cleanup.

This branch is based on the previous clk pull request.

* tag 'tegra-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra

: (25 commits)
  clk: tegra: Fix cdev1 and cdev2 IDs
  ARM: dts: tegra: add the PM configurations of PMC
  ARM: tegra: add non-removable and keep-power-in-suspend property for MMC
  ARM: tegra: whistler: add wakeup source for KBC
  ARM: tegra: add power gpio keys to DT
  ARM: tegra: keep power on to SD slot on Dalmore
  ARM: tegra: add clocks property to AC'97 sound nodes
  ARM: tegra: add clocks property to sound nodes
  ARM: tegra: dalmore: add fixed regulator node
  ARM: tegra: dalmore: add TPS65090 node
  ARM: tegra: dalmore: add cpu regulator node
  ARM: tegra: Add sbs-battery node to Dalmore
  ARM: tegra: add DT binding for i2c-tegra
  ARM: tegra: add SPI nodes to Tegra114 DT
  ARM: tegra: add KBC nodes to Tegra114 DT
  ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114
  ARM: tegra: add I2C nodes to Tegra114 DT
  ARM: tegra: add APB DMA nodes to Tegra114 DT
  ARM: tegra: add PWM nodes to Tegra114 DT
  ARM: tegra: fix the status of PWM DT nodes
  ...

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents f8da810c 1071b2df

Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.txt

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+60 −0
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NVIDIA Tegra20/Tegra30/Tegra114 I2C controller driver.



Required properties:

- compatible : should be:

	"nvidia,tegra114-i2c"

	"nvidia,tegra30-i2c"

	"nvidia,tegra20-i2c"

	"nvidia,tegra20-i2c-dvc"

  Details of compatible are as follows:

  nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C

	controller. This only support master mode of I2C communication. Register

	interface/offset and interrupts handling are different than generic I2C

	controller. Driver of DVC I2C controller is only compatible with

	"nvidia,tegra20-i2c-dvc".

  nvidia,tegra20-i2c: Tegra20 has 4 generic I2C controller. This can support

	master and slave mode of I2C communication. The i2c-tegra driver only

	support master mode of I2C communication. Driver of I2C controller is

	only compatible with "nvidia,tegra20-i2c".

  nvidia,tegra30-i2c: Tegra30 has 5 generic I2C controller. This controller is

	very much similar to Tegra20 I2C controller with additional feature:

	Continue Transfer Support. This feature helps to implement M_NO_START

	as per I2C core API transfer flags. Driver of I2C controller is

	compatible with "nvidia,tegra30-i2c" to enable the continue transfer

	support. This is also compatible with "nvidia,tegra20-i2c" without

	continue transfer support.

  nvidia,tegra114-i2c: Tegra114 has 5 generic I2C controller. This controller is

	very much similar to Tegra30 I2C controller with some hardware

	modification:

	 - Tegra30/Tegra20 I2C controller has 2 clock source called div-clk and

	   fast-clk. Tegra114 has only one clock source called as div-clk and

	   hence clock mechanism is changed in I2C controller.

	 - Tegra30/Tegra20 I2C controller has enabled per packet transfer by

	   default and there is no way to disable it. Tegra114 has this

	   interrupt disable by default and SW need to enable explicitly.

	Due to above changes, Tegra114 I2C driver makes incompatible with

	previous hardware driver. Hence, tegra114 I2C controller is compatible

	with "nvidia,tegra114-i2c".

- reg: Should contain I2C controller registers physical address and length.

- interrupts: Should contain I2C controller interrupts.

- address-cells: Address cells for I2C device address.

- size-cells: Size of the I2C device address.

- clocks: Clock ID as per

		Documentation/devicetree/bindings/clock/tegra<chip-id>.txt

	for I2C controller.

- clock-names: Name of the clock:

	Tegra20/Tegra30 I2C controller: "div-clk and "fast-clk".

	Tegra114 I2C controller: "div-clk".



Example:



	i2c@7000c000 {

		compatible = "nvidia,tegra20-i2c";

		reg = <0x7000c000 0x100>;

		interrupts = <0 38 0x04>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&tegra_car 12>, <&tegra_car 124>;

		clock-names = "div-clk", "fast-clk";

		status = "disabled";

	};

Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt

+8 −0
Original line number Diff line number Diff line
@@ -2,6 +2,11 @@ NVIDIA Tegra audio complex 


Required properties:

- compatible : "nvidia,tegra-audio-alc5632"

- clocks : Must contain an entry for each entry in clock-names.

- clock-names : Must include the following entries:

  "pll_a" (The Tegra clock of that name),

  "pll_a_out0" (The Tegra clock of that name),

  "mclk" (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)

- nvidia,model : The user-visible name of this sound complex.

- nvidia,audio-routing : A list of the connections between audio components.

  Each entry is a pair of strings, the first being the connection's sink,
@@ -56,4 +61,7 @@ sound { 


	nvidia,i2s-controller = <&tegra_i2s1>;

	nvidia,audio-codec = <&alc5632>;



	clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;

	clock-names = "pll_a", "pll_a_out0", "mclk";

};

Documentation/devicetree/bindings/sound/nvidia,tegra-audio-trimslice.txt

+7 −0
Original line number Diff line number Diff line
@@ -2,6 +2,11 @@ NVIDIA Tegra audio complex for TrimSlice 


Required properties:

- compatible : "nvidia,tegra-audio-trimslice"

- clocks : Must contain an entry for each entry in clock-names.

- clock-names : Must include the following entries:

  "pll_a" (The Tegra clock of that name),

  "pll_a_out0" (The Tegra clock of that name),

  "mclk" (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)

- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller

- nvidia,audio-codec : The phandle of the WM8903 audio codec
@@ -11,4 +16,6 @@ sound { 
	compatible = "nvidia,tegra-audio-trimslice";

	nvidia,i2s-controller = <&tegra_i2s1>;

	nvidia,audio-codec = <&codec>;

	clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;

	clock-names = "pll_a", "pll_a_out0", "mclk";

};

Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt

+8 −0
Original line number Diff line number Diff line
@@ -2,6 +2,11 @@ NVIDIA Tegra audio complex 


Required properties:

- compatible : "nvidia,tegra-audio-wm8753"

- clocks : Must contain an entry for each entry in clock-names.

- clock-names : Must include the following entries:

  "pll_a" (The Tegra clock of that name),

  "pll_a_out0" (The Tegra clock of that name),

  "mclk" (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)

- nvidia,model : The user-visible name of this sound complex.

- nvidia,audio-routing : A list of the connections between audio components.

  Each entry is a pair of strings, the first being the connection's sink,
@@ -50,5 +55,8 @@ sound { 


	nvidia,i2s-controller = <&i2s1>;

	nvidia,audio-codec = <&wm8753>;



	clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;

	clock-names = "pll_a", "pll_a_out0", "mclk";

};

Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt

+8 −0
Original line number Diff line number Diff line
@@ -2,6 +2,11 @@ NVIDIA Tegra audio complex 


Required properties:

- compatible : "nvidia,tegra-audio-wm8903"

- clocks : Must contain an entry for each entry in clock-names.

- clock-names : Must include the following entries:

  "pll_a" (The Tegra clock of that name),

  "pll_a_out0" (The Tegra clock of that name),

  "mclk" (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)

- nvidia,model : The user-visible name of this sound complex.

- nvidia,audio-routing : A list of the connections between audio components.

  Each entry is a pair of strings, the first being the connection's sink,
@@ -67,5 +72,8 @@ sound { 
	nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */

	nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */

	nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */



	clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;

	clock-names = "pll_a", "pll_a_out0", "mclk";

};