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Commit 4f1ca9e9 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
Browse files

drm/i915: Implement WaDisableSDEUnitClockGating:bdw 



Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarBen Widawsky <ben@bwidawsk.net>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 295e8bb7

drivers/gpu/drm/i915/i915_reg.h

+3 −0
Original line number Diff line number Diff line
@@ -4906,6 +4906,9 @@ 
#define GEN7_UCGCTL4				0x940c

#define  GEN7_L3BANK2X_CLOCK_GATE_DISABLE	(1<<25)



#define GEN8_UCGCTL6				0x9430

#define   GEN8_SDEUNIT_CLOCK_GATE_DISABLE	(1<<14)



#define GEN6_RPNSWREQ				0xA008

#define   GEN6_TURBO_DISABLE			(1<<31)

#define   GEN6_FREQUENCY(x)			((x)<<25)

drivers/gpu/drm/i915/intel_pm.c

+4 −0
Original line number Diff line number Diff line
@@ -4870,6 +4870,10 @@ static void gen8_init_clock_gating(struct drm_device *dev) 


	I915_WRITE(GEN6_RC_SLEEP_PSMI_CONTROL,

		   _MASKED_BIT_ENABLE(GEN8_RC_SEMA_IDLE_MSG_DISABLE));



	/* WaDisableSDEUnitClockGating:bdw */

	I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |

		   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);

}



static void haswell_init_clock_gating(struct drm_device *dev)