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Commit 295e8bb7 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
Browse files

drm/i915: Disable semaphore wait event idle message on BDW 



According to BSpec we need to always set this magic bit in ring buffer
mode.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 619d4d04

drivers/gpu/drm/i915/i915_reg.h

+3 −0
Original line number Original line Diff line number Diff line
@@ -949,6 +949,9 @@ 
#define   GEN6_BLITTER_LOCK_SHIFT			16

#define   GEN6_BLITTER_LOCK_SHIFT			16

#define   GEN6_BLITTER_FBC_NOTIFY			(1<<3)

#define   GEN6_BLITTER_FBC_NOTIFY			(1<<3)





#define GEN6_RC_SLEEP_PSMI_CONTROL	0x2050

#define   GEN8_RC_SEMA_IDLE_MSG_DISABLE	(1 << 12)



#define GEN6_BSD_SLEEP_PSMI_CONTROL	0x12050

#define GEN6_BSD_SLEEP_PSMI_CONTROL	0x12050

#define   GEN6_BSD_SLEEP_MSG_DISABLE	(1 << 0)

#define   GEN6_BSD_SLEEP_MSG_DISABLE	(1 << 0)

#define   GEN6_BSD_SLEEP_FLUSH_DISABLE	(1 << 2)

#define   GEN6_BSD_SLEEP_FLUSH_DISABLE	(1 << 2)

drivers/gpu/drm/i915/intel_pm.c

+3 −0
Original line number Original line Diff line number Diff line
@@ -4867,6 +4867,9 @@ static void gen8_init_clock_gating(struct drm_device *dev) 
	 */

	 */

	I915_WRITE(GEN7_GT_MODE,

	I915_WRITE(GEN7_GT_MODE,

		   GEN6_WIZ_HASHING_MASK | GEN6_WIZ_HASHING_16x4);

		   GEN6_WIZ_HASHING_MASK | GEN6_WIZ_HASHING_16x4);



	I915_WRITE(GEN6_RC_SLEEP_PSMI_CONTROL,

		   _MASKED_BIT_ENABLE(GEN8_RC_SEMA_IDLE_MSG_DISABLE));

}

}





static void haswell_init_clock_gating(struct drm_device *dev)

static void haswell_init_clock_gating(struct drm_device *dev)