Loading drivers/i2c/busses/i2c-pnx.c +44 −37 Original line number Original line Diff line number Diff line Loading @@ -86,8 +86,8 @@ static int i2c_pnx_start(unsigned char slave_addr, /* Check for 7 bit slave addresses only */ /* Check for 7 bit slave addresses only */ if (slave_addr & ~0x7f) { if (slave_addr & ~0x7f) { dev_err(&alg_data->adapter.dev, "%s: Invalid slave address %x. " dev_err(&alg_data->adapter.dev, "Only 7-bit addresses are supported\n", "%s: Invalid slave address %x. Only 7-bit addresses are supported\n", alg_data->adapter.name, slave_addr); alg_data->adapter.name, slave_addr); return -EINVAL; return -EINVAL; } } Loading @@ -95,16 +95,17 @@ static int i2c_pnx_start(unsigned char slave_addr, /* First, make sure bus is idle */ /* First, make sure bus is idle */ if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) { if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) { /* Somebody else is monopolizing the bus */ /* Somebody else is monopolizing the bus */ dev_err(&alg_data->adapter.dev, "%s: Bus busy. Slave addr = %02x, " dev_err(&alg_data->adapter.dev, "cntrl = %x, stat = %x\n", "%s: Bus busy. Slave addr = %02x, cntrl = %x, stat = %x\n", alg_data->adapter.name, slave_addr, alg_data->adapter.name, slave_addr, ioread32(I2C_REG_CTL(alg_data)), ioread32(I2C_REG_CTL(alg_data)), ioread32(I2C_REG_STS(alg_data))); ioread32(I2C_REG_STS(alg_data))); return -EBUSY; return -EBUSY; } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) { } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) { /* Sorry, we lost the bus */ /* Sorry, we lost the bus */ dev_err(&alg_data->adapter.dev, "%s: Arbitration failure. " dev_err(&alg_data->adapter.dev, "Slave addr = %02x\n", alg_data->adapter.name, slave_addr); "%s: Arbitration failure. Slave addr = %02x\n", alg_data->adapter.name, slave_addr); return -EIO; return -EIO; } } Loading Loading @@ -182,15 +183,15 @@ static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data) alg_data->mif.len--; alg_data->mif.len--; iowrite32(val, I2C_REG_TX(alg_data)); iowrite32(val, I2C_REG_TX(alg_data)); dev_dbg(&alg_data->adapter.dev, "%s(): xmit %#x [%d]\n", __func__, dev_dbg(&alg_data->adapter.dev, "%s(): xmit %#x [%d]\n", val, alg_data->mif.len + 1); __func__, val, alg_data->mif.len + 1); if (alg_data->mif.len == 0) { if (alg_data->mif.len == 0) { if (alg_data->last) { if (alg_data->last) { /* Wait until the STOP is seen. */ /* Wait until the STOP is seen. */ if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) dev_err(&alg_data->adapter.dev, "The bus is still " dev_err(&alg_data->adapter.dev, "active after timeout\n"); "The bus is still active after timeout\n"); } } /* Disable master interrupts */ /* Disable master interrupts */ iowrite32(ioread32(I2C_REG_CTL(alg_data)) & iowrite32(ioread32(I2C_REG_CTL(alg_data)) & Loading @@ -199,7 +200,8 @@ static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data) del_timer_sync(&alg_data->mif.timer); del_timer_sync(&alg_data->mif.timer); dev_dbg(&alg_data->adapter.dev, "%s(): Waking up xfer routine.\n", dev_dbg(&alg_data->adapter.dev, "%s(): Waking up xfer routine.\n", __func__); __func__); complete(&alg_data->mif.complete); complete(&alg_data->mif.complete); Loading @@ -215,8 +217,9 @@ static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data) /* Stop timer. */ /* Stop timer. */ del_timer_sync(&alg_data->mif.timer); del_timer_sync(&alg_data->mif.timer); dev_dbg(&alg_data->adapter.dev, "%s(): Waking up xfer routine after " dev_dbg(&alg_data->adapter.dev, "zero-xfer.\n", __func__); "%s(): Waking up xfer routine after zero-xfer.\n", __func__); complete(&alg_data->mif.complete); complete(&alg_data->mif.complete); } } Loading Loading @@ -245,8 +248,9 @@ static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data) * or we didn't 'ask' for it yet. * or we didn't 'ask' for it yet. */ */ if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) { if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) { dev_dbg(&alg_data->adapter.dev, "%s(): Write dummy data to fill " dev_dbg(&alg_data->adapter.dev, "Rx-fifo...\n", __func__); "%s(): Write dummy data to fill Rx-fifo...\n", __func__); if (alg_data->mif.len == 1) { if (alg_data->mif.len == 1) { /* Last byte, do not acknowledge next rcv. */ /* Last byte, do not acknowledge next rcv. */ Loading Loading @@ -278,16 +282,16 @@ static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data) if (alg_data->mif.len > 0) { if (alg_data->mif.len > 0) { val = ioread32(I2C_REG_RX(alg_data)); val = ioread32(I2C_REG_RX(alg_data)); *alg_data->mif.buf++ = (u8) (val & 0xff); *alg_data->mif.buf++ = (u8) (val & 0xff); dev_dbg(&alg_data->adapter.dev, "%s(): rcv 0x%x [%d]\n", __func__, val, dev_dbg(&alg_data->adapter.dev, "%s(): rcv 0x%x [%d]\n", alg_data->mif.len); __func__, val, alg_data->mif.len); alg_data->mif.len--; alg_data->mif.len--; if (alg_data->mif.len == 0) { if (alg_data->mif.len == 0) { if (alg_data->last) if (alg_data->last) /* Wait until the STOP is seen. */ /* Wait until the STOP is seen. */ if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) dev_err(&alg_data->adapter.dev, "The bus is still " dev_err(&alg_data->adapter.dev, "active after timeout\n"); "The bus is still active after timeout\n"); /* Disable master interrupts */ /* Disable master interrupts */ ctl = ioread32(I2C_REG_CTL(alg_data)); ctl = ioread32(I2C_REG_CTL(alg_data)); Loading @@ -312,7 +316,8 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id) struct i2c_pnx_algo_data *alg_data = dev_id; struct i2c_pnx_algo_data *alg_data = dev_id; u32 stat, ctl; u32 stat, ctl; dev_dbg(&alg_data->adapter.dev, "%s(): mstat = %x mctrl = %x, mode = %d\n", dev_dbg(&alg_data->adapter.dev, "%s(): mstat = %x mctrl = %x, mode = %d\n", __func__, __func__, ioread32(I2C_REG_STS(alg_data)), ioread32(I2C_REG_STS(alg_data)), ioread32(I2C_REG_CTL(alg_data)), ioread32(I2C_REG_CTL(alg_data)), Loading @@ -335,8 +340,8 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id) complete(&alg_data->mif.complete); complete(&alg_data->mif.complete); } else if (stat & mstatus_nai) { } else if (stat & mstatus_nai) { /* Slave did not acknowledge, generate a STOP */ /* Slave did not acknowledge, generate a STOP */ dev_dbg(&alg_data->adapter.dev, "%s(): " dev_dbg(&alg_data->adapter.dev, "Slave did not acknowledge, generating a STOP.\n", "%s(): Slave did not acknowledge, generating a STOP.\n", __func__); __func__); i2c_pnx_stop(alg_data); i2c_pnx_stop(alg_data); Loading Loading @@ -375,7 +380,8 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id) stat = ioread32(I2C_REG_STS(alg_data)); stat = ioread32(I2C_REG_STS(alg_data)); iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data)); iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data)); dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x ctrl = %x.\n", dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x ctrl = %x.\n", __func__, ioread32(I2C_REG_STS(alg_data)), __func__, ioread32(I2C_REG_STS(alg_data)), ioread32(I2C_REG_CTL(alg_data))); ioread32(I2C_REG_CTL(alg_data))); Loading @@ -387,8 +393,8 @@ static void i2c_pnx_timeout(unsigned long data) struct i2c_pnx_algo_data *alg_data = (struct i2c_pnx_algo_data *)data; struct i2c_pnx_algo_data *alg_data = (struct i2c_pnx_algo_data *)data; u32 ctl; u32 ctl; dev_err(&alg_data->adapter.dev, "Master timed out. stat = %04x, cntrl = %04x. " dev_err(&alg_data->adapter.dev, "Resetting master...\n", "Master timed out. stat = %04x, cntrl = %04x. Resetting master...\n", ioread32(I2C_REG_STS(alg_data)), ioread32(I2C_REG_STS(alg_data)), ioread32(I2C_REG_CTL(alg_data))); ioread32(I2C_REG_CTL(alg_data))); Loading Loading @@ -445,7 +451,8 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) struct i2c_pnx_algo_data *alg_data = adap->algo_data; struct i2c_pnx_algo_data *alg_data = adap->algo_data; u32 stat = ioread32(I2C_REG_STS(alg_data)); u32 stat = ioread32(I2C_REG_STS(alg_data)); dev_dbg(&alg_data->adapter.dev, "%s(): entering: %d messages, stat = %04x.\n", dev_dbg(&alg_data->adapter.dev, "%s(): entering: %d messages, stat = %04x.\n", __func__, num, ioread32(I2C_REG_STS(alg_data))); __func__, num, ioread32(I2C_REG_STS(alg_data))); bus_reset_if_active(alg_data); bus_reset_if_active(alg_data); Loading @@ -472,9 +479,8 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) alg_data->mif.ret = 0; alg_data->mif.ret = 0; alg_data->last = (i == num - 1); alg_data->last = (i == num - 1); dev_dbg(&alg_data->adapter.dev, "%s(): mode %d, %d bytes\n", __func__, dev_dbg(&alg_data->adapter.dev, "%s(): mode %d, %d bytes\n", alg_data->mif.mode, __func__, alg_data->mif.mode, alg_data->mif.len); alg_data->mif.len); i2c_pnx_arm_timer(alg_data); i2c_pnx_arm_timer(alg_data); Loading @@ -496,7 +502,8 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) if (!(rc = alg_data->mif.ret)) if (!(rc = alg_data->mif.ret)) completed++; completed++; dev_dbg(&alg_data->adapter.dev, "%s(): Complete, return code = %d.\n", dev_dbg(&alg_data->adapter.dev, "%s(): Complete, return code = %d.\n", __func__, rc); __func__, rc); /* Clear TDI and AFI bits in case they are set. */ /* Clear TDI and AFI bits in case they are set. */ Loading Loading
drivers/i2c/busses/i2c-pnx.c +44 −37 Original line number Original line Diff line number Diff line Loading @@ -86,8 +86,8 @@ static int i2c_pnx_start(unsigned char slave_addr, /* Check for 7 bit slave addresses only */ /* Check for 7 bit slave addresses only */ if (slave_addr & ~0x7f) { if (slave_addr & ~0x7f) { dev_err(&alg_data->adapter.dev, "%s: Invalid slave address %x. " dev_err(&alg_data->adapter.dev, "Only 7-bit addresses are supported\n", "%s: Invalid slave address %x. Only 7-bit addresses are supported\n", alg_data->adapter.name, slave_addr); alg_data->adapter.name, slave_addr); return -EINVAL; return -EINVAL; } } Loading @@ -95,16 +95,17 @@ static int i2c_pnx_start(unsigned char slave_addr, /* First, make sure bus is idle */ /* First, make sure bus is idle */ if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) { if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) { /* Somebody else is monopolizing the bus */ /* Somebody else is monopolizing the bus */ dev_err(&alg_data->adapter.dev, "%s: Bus busy. Slave addr = %02x, " dev_err(&alg_data->adapter.dev, "cntrl = %x, stat = %x\n", "%s: Bus busy. Slave addr = %02x, cntrl = %x, stat = %x\n", alg_data->adapter.name, slave_addr, alg_data->adapter.name, slave_addr, ioread32(I2C_REG_CTL(alg_data)), ioread32(I2C_REG_CTL(alg_data)), ioread32(I2C_REG_STS(alg_data))); ioread32(I2C_REG_STS(alg_data))); return -EBUSY; return -EBUSY; } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) { } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) { /* Sorry, we lost the bus */ /* Sorry, we lost the bus */ dev_err(&alg_data->adapter.dev, "%s: Arbitration failure. " dev_err(&alg_data->adapter.dev, "Slave addr = %02x\n", alg_data->adapter.name, slave_addr); "%s: Arbitration failure. Slave addr = %02x\n", alg_data->adapter.name, slave_addr); return -EIO; return -EIO; } } Loading Loading @@ -182,15 +183,15 @@ static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data) alg_data->mif.len--; alg_data->mif.len--; iowrite32(val, I2C_REG_TX(alg_data)); iowrite32(val, I2C_REG_TX(alg_data)); dev_dbg(&alg_data->adapter.dev, "%s(): xmit %#x [%d]\n", __func__, dev_dbg(&alg_data->adapter.dev, "%s(): xmit %#x [%d]\n", val, alg_data->mif.len + 1); __func__, val, alg_data->mif.len + 1); if (alg_data->mif.len == 0) { if (alg_data->mif.len == 0) { if (alg_data->last) { if (alg_data->last) { /* Wait until the STOP is seen. */ /* Wait until the STOP is seen. */ if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) dev_err(&alg_data->adapter.dev, "The bus is still " dev_err(&alg_data->adapter.dev, "active after timeout\n"); "The bus is still active after timeout\n"); } } /* Disable master interrupts */ /* Disable master interrupts */ iowrite32(ioread32(I2C_REG_CTL(alg_data)) & iowrite32(ioread32(I2C_REG_CTL(alg_data)) & Loading @@ -199,7 +200,8 @@ static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data) del_timer_sync(&alg_data->mif.timer); del_timer_sync(&alg_data->mif.timer); dev_dbg(&alg_data->adapter.dev, "%s(): Waking up xfer routine.\n", dev_dbg(&alg_data->adapter.dev, "%s(): Waking up xfer routine.\n", __func__); __func__); complete(&alg_data->mif.complete); complete(&alg_data->mif.complete); Loading @@ -215,8 +217,9 @@ static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data) /* Stop timer. */ /* Stop timer. */ del_timer_sync(&alg_data->mif.timer); del_timer_sync(&alg_data->mif.timer); dev_dbg(&alg_data->adapter.dev, "%s(): Waking up xfer routine after " dev_dbg(&alg_data->adapter.dev, "zero-xfer.\n", __func__); "%s(): Waking up xfer routine after zero-xfer.\n", __func__); complete(&alg_data->mif.complete); complete(&alg_data->mif.complete); } } Loading Loading @@ -245,8 +248,9 @@ static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data) * or we didn't 'ask' for it yet. * or we didn't 'ask' for it yet. */ */ if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) { if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) { dev_dbg(&alg_data->adapter.dev, "%s(): Write dummy data to fill " dev_dbg(&alg_data->adapter.dev, "Rx-fifo...\n", __func__); "%s(): Write dummy data to fill Rx-fifo...\n", __func__); if (alg_data->mif.len == 1) { if (alg_data->mif.len == 1) { /* Last byte, do not acknowledge next rcv. */ /* Last byte, do not acknowledge next rcv. */ Loading Loading @@ -278,16 +282,16 @@ static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data) if (alg_data->mif.len > 0) { if (alg_data->mif.len > 0) { val = ioread32(I2C_REG_RX(alg_data)); val = ioread32(I2C_REG_RX(alg_data)); *alg_data->mif.buf++ = (u8) (val & 0xff); *alg_data->mif.buf++ = (u8) (val & 0xff); dev_dbg(&alg_data->adapter.dev, "%s(): rcv 0x%x [%d]\n", __func__, val, dev_dbg(&alg_data->adapter.dev, "%s(): rcv 0x%x [%d]\n", alg_data->mif.len); __func__, val, alg_data->mif.len); alg_data->mif.len--; alg_data->mif.len--; if (alg_data->mif.len == 0) { if (alg_data->mif.len == 0) { if (alg_data->last) if (alg_data->last) /* Wait until the STOP is seen. */ /* Wait until the STOP is seen. */ if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) dev_err(&alg_data->adapter.dev, "The bus is still " dev_err(&alg_data->adapter.dev, "active after timeout\n"); "The bus is still active after timeout\n"); /* Disable master interrupts */ /* Disable master interrupts */ ctl = ioread32(I2C_REG_CTL(alg_data)); ctl = ioread32(I2C_REG_CTL(alg_data)); Loading @@ -312,7 +316,8 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id) struct i2c_pnx_algo_data *alg_data = dev_id; struct i2c_pnx_algo_data *alg_data = dev_id; u32 stat, ctl; u32 stat, ctl; dev_dbg(&alg_data->adapter.dev, "%s(): mstat = %x mctrl = %x, mode = %d\n", dev_dbg(&alg_data->adapter.dev, "%s(): mstat = %x mctrl = %x, mode = %d\n", __func__, __func__, ioread32(I2C_REG_STS(alg_data)), ioread32(I2C_REG_STS(alg_data)), ioread32(I2C_REG_CTL(alg_data)), ioread32(I2C_REG_CTL(alg_data)), Loading @@ -335,8 +340,8 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id) complete(&alg_data->mif.complete); complete(&alg_data->mif.complete); } else if (stat & mstatus_nai) { } else if (stat & mstatus_nai) { /* Slave did not acknowledge, generate a STOP */ /* Slave did not acknowledge, generate a STOP */ dev_dbg(&alg_data->adapter.dev, "%s(): " dev_dbg(&alg_data->adapter.dev, "Slave did not acknowledge, generating a STOP.\n", "%s(): Slave did not acknowledge, generating a STOP.\n", __func__); __func__); i2c_pnx_stop(alg_data); i2c_pnx_stop(alg_data); Loading Loading @@ -375,7 +380,8 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id) stat = ioread32(I2C_REG_STS(alg_data)); stat = ioread32(I2C_REG_STS(alg_data)); iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data)); iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data)); dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x ctrl = %x.\n", dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x ctrl = %x.\n", __func__, ioread32(I2C_REG_STS(alg_data)), __func__, ioread32(I2C_REG_STS(alg_data)), ioread32(I2C_REG_CTL(alg_data))); ioread32(I2C_REG_CTL(alg_data))); Loading @@ -387,8 +393,8 @@ static void i2c_pnx_timeout(unsigned long data) struct i2c_pnx_algo_data *alg_data = (struct i2c_pnx_algo_data *)data; struct i2c_pnx_algo_data *alg_data = (struct i2c_pnx_algo_data *)data; u32 ctl; u32 ctl; dev_err(&alg_data->adapter.dev, "Master timed out. stat = %04x, cntrl = %04x. " dev_err(&alg_data->adapter.dev, "Resetting master...\n", "Master timed out. stat = %04x, cntrl = %04x. Resetting master...\n", ioread32(I2C_REG_STS(alg_data)), ioread32(I2C_REG_STS(alg_data)), ioread32(I2C_REG_CTL(alg_data))); ioread32(I2C_REG_CTL(alg_data))); Loading Loading @@ -445,7 +451,8 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) struct i2c_pnx_algo_data *alg_data = adap->algo_data; struct i2c_pnx_algo_data *alg_data = adap->algo_data; u32 stat = ioread32(I2C_REG_STS(alg_data)); u32 stat = ioread32(I2C_REG_STS(alg_data)); dev_dbg(&alg_data->adapter.dev, "%s(): entering: %d messages, stat = %04x.\n", dev_dbg(&alg_data->adapter.dev, "%s(): entering: %d messages, stat = %04x.\n", __func__, num, ioread32(I2C_REG_STS(alg_data))); __func__, num, ioread32(I2C_REG_STS(alg_data))); bus_reset_if_active(alg_data); bus_reset_if_active(alg_data); Loading @@ -472,9 +479,8 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) alg_data->mif.ret = 0; alg_data->mif.ret = 0; alg_data->last = (i == num - 1); alg_data->last = (i == num - 1); dev_dbg(&alg_data->adapter.dev, "%s(): mode %d, %d bytes\n", __func__, dev_dbg(&alg_data->adapter.dev, "%s(): mode %d, %d bytes\n", alg_data->mif.mode, __func__, alg_data->mif.mode, alg_data->mif.len); alg_data->mif.len); i2c_pnx_arm_timer(alg_data); i2c_pnx_arm_timer(alg_data); Loading @@ -496,7 +502,8 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) if (!(rc = alg_data->mif.ret)) if (!(rc = alg_data->mif.ret)) completed++; completed++; dev_dbg(&alg_data->adapter.dev, "%s(): Complete, return code = %d.\n", dev_dbg(&alg_data->adapter.dev, "%s(): Complete, return code = %d.\n", __func__, rc); __func__, rc); /* Clear TDI and AFI bits in case they are set. */ /* Clear TDI and AFI bits in case they are set. */ Loading