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Commit 44df4d11 authored by Mike Dunn's avatar Mike Dunn Committed by David Woodhouse
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mtd: nand: fix incorrect ecc strength values

This fixes a couple of ecc strength values for which I earlier made conservative
guesses, but whose correct values were later determined¹ (thanks Ivan).  Also
sets strength for fsl_ifc_nand, which was merged to mainline after the original
patch that set the strength for all drivers.

¹ http://lists.infradead.org/pipermail/linux-mtd/2012-March/040325.html



Signed-off-by: default avatarMike Dunn <mikedunn@newsguy.com>
Signed-off-by: default avatarArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
parent 86c2072b
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+1 −6
Original line number Diff line number Diff line
@@ -476,12 +476,7 @@ static int __devinit bcm_umi_nand_probe(struct platform_device *pdev)
		this->badblock_pattern = &largepage_bbt;
	}

	/*
	 * FIXME: ecc strength value of 6 bits per 512 bytes of data is a
	 * conservative guess, given 13 ecc bytes and using bch alg.
	 * (Assume Galois field order m=15 to allow a margin of error.)
	 */
	this->ecc.strength = 6;
	this->ecc.strength = 8;

#endif

+1 −0
Original line number Diff line number Diff line
@@ -821,6 +821,7 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
	/* Hardware generates ECC per 512 Bytes */
	chip->ecc.size = 512;
	chip->ecc.bytes = 8;
	chip->ecc.strength = 4;

	switch (csor & CSOR_NAND_PGS_MASK) {
	case CSOR_NAND_PGS_512:
+1 −5
Original line number Diff line number Diff line
@@ -332,11 +332,7 @@ static int __devinit jz_nand_probe(struct platform_device *pdev)
	chip->ecc.mode		= NAND_ECC_HW_OOB_FIRST;
	chip->ecc.size		= 512;
	chip->ecc.bytes		= 9;
	chip->ecc.strength	= 2;
	/*
	 * FIXME: ecc_strength value of 2 bits per 512 bytes of data is a
	 * conservative guess, given 9 ecc bytes and reed-solomon alg.
	 */
	chip->ecc.strength	= 4;

	if (pdata)
		chip->ecc.layout = pdata->ecc_layout;