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Commit 86c2072b authored Apr 25, 2012 by Mike Dunn Committed by David Woodhouse May 13, 2012

mtd: ecc_strength is at ecc step granularity

ecc_strength element of mtd_info will be the strength of one ecc step, not of
the entire writesize, as was previously planned. This is the appropriate way
because, as was pointed out¹, bit errors in excess of the strength of one
step can cause a hard error if they all occur within the same ecc region.

¹ http://lists.infradead.org/pipermail/linux-mtd/2012-March/040313.html

Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

parent 09cbe581

drivers/mtd/nand/nand_base.c

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -3487,7 +3487,7 @@ int nand_scan_tail(struct mtd_info *mtd)

	/* propagate ecc info to mtd_info */		/* propagate ecc info to mtd_info */
	mtd->ecclayout = chip->ecc.layout;		mtd->ecclayout = chip->ecc.layout;
	mtd->ecc_strength = chip->ecc.strength * chip->ecc.steps;		mtd->ecc_strength = chip->ecc.strength;

	/* Check, if we should skip the bad block table scan */		/* Check, if we should skip the bad block table scan */
	if (chip->options & NAND_SKIP_BBTSCAN)		if (chip->options & NAND_SKIP_BBTSCAN)

include/linux/mtd/mtd.h

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -164,7 +164,7 @@ struct mtd_info {
	/* ECC layout structure pointer - read only! */		/* ECC layout structure pointer - read only! */
	struct nand_ecclayout *ecclayout;		struct nand_ecclayout *ecclayout;

	/* max number of correctible bit errors per writesize */		/* max number of correctible bit errors per ecc step */
	unsigned int ecc_strength;		unsigned int ecc_strength;

	/* Data for variable erase regions. If numeraseregions is zero,		/* Data for variable erase regions. If numeraseregions is zero,