Commit 3c417588 authored Jun 08, 2010 by Huang Ying Committed by H. Peter Anvin Jun 10, 2010

x86, mce: Fix MSR_IA32_MCI_CTL2 CMCI threshold setup



It is reported that CMCI is not raised when number of corrected error
reaches preset threshold. After inspection, it is found that
MSR_IA32_MCI_CTL2 threshold field is not setup properly. This patch
fixed it.

Value of MCI_CTL2_CMCI_THRESHOLD_MASK is fixed according to x86_64
Software Developer's Manual too.

Reported-by: Shaohui Zheng <shaohui.zheng@intel.com>
Signed-off-by: Huang Ying <ying.huang@intel.com>
LKML-Reference: <1275977350.3444.660.camel@yhuang-dev.sh.intel.com>
Reviewed-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>

parent 1f9a0bd4

arch/x86/include/asm/mce.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -40,7 +40,7 @@

		/* CTL2 register defines */
		#define MCI_CTL2_CMCI_EN (1ULL << 30)
		#define MCI_CTL2_CMCI_THRESHOLD_MASK 0xffffULL
		#define MCI_CTL2_CMCI_THRESHOLD_MASK 0x7fffULL

		#define MCJ_CTX_MASK 3
		#define MCJ_CTX(flags) ((flags) & MCJ_CTX_MASK)

arch/x86/kernel/cpu/mcheck/mce_intel.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -102,6 +102,7 @@ static void cmci_discover(int banks, int boot)
		continue;
		}

		val &= ~MCI_CTL2_CMCI_THRESHOLD_MASK;
		val \|= MCI_CTL2_CMCI_EN \| CMCI_THRESHOLD;
		wrmsrl(MSR_IA32_MCx_CTL2(i), val);
		rdmsrl(MSR_IA32_MCx_CTL2(i), val);