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Commit 38f56f33 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull ARM SoC device tree updates (part 2) from Arnd Bergmann:
 "These are mostly new device tree bindings for existing drivers, as
  well as changes to the device tree source files to add support for
  those devices, and a couple of new boards, most notably Samsung's
  Exynos5 based Chromebook.

  The changes depend on earlier platform specific updates and touch the
  usual platforms: omap, exynos, tegra, mxs, mvebu and davinci."

* tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (169 commits)
  ARM: exynos: dts: cros5250: add EC device
  ARM: dts: Add sbs-battery for exynos5250-snow
  ARM: dts: Add i2c-arbitrator bus for exynos5250-snow
  ARM: dts: add mshc controller node for Exynos4x12 SoCs
  ARM: dts: Add chip-id controller node on Exynos4/5 SoC
  ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree
  ARM: davinci: da850-evm: add SPI flash support
  ARM: davinci: da850: override SPI DT node device name
  ARM: davinci: da850: add SPI1 DT node
  spi/davinci: add DT binding documentation
  spi/davinci: no wildcards in DT compatible property
  ARM: dts: mvebu: Convert mvebu device tree files to 64 bits
  ARM: dts: mvebu: introduce internal-regs node
  ARM: dts: mvebu: Convert all the mvebu files to use the range property
  ARM: dts: mvebu: move all peripherals inside soc
  ARM: dts: mvebu: fix cpus section indentation
  ARM: davinci: da850: add EHRPWM & ECAP DT node
  ARM/dts: OMAP3: fix pinctrl-single configuration
  ARM: dts: Add OMAP3430 SDP NOR flash memory binding
  ARM: dts: Add NOR flash bindings for OMAP2420 H4
  ...
parents fcba9145 4183bef2
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+1 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ provided by Arteris.
Required properties:
- compatible : Should be "ti,omap3-l3-smx" for OMAP3 family
               Should be "ti,omap4-l3-noc" for OMAP4 family
- reg:	Contains L3 register address range for each noc domain.
- ti,hwmods: "l3_main_1", ... One hwmod for each noc domain.

Examples:
+15 −2
Original line number Diff line number Diff line
OMAP Timer bindings

Required properties:
- compatible:		Must be "ti,omap2-timer" for OMAP2+ controllers.
- compatible:		Should be set to one of the below. Please note that
			OMAP44xx devices have timer instances that are 100%
			register compatible with OMAP3xxx devices as well as
			newer timers that are not 100% register compatible.
			So for OMAP44xx devices timer instances may use
			different compatible strings.

			ti,omap2420-timer (applicable to OMAP24xx devices)
			ti,omap3430-timer (applicable to OMAP3xxx/44xx devices)
			ti,omap4430-timer (applicable to OMAP44xx devices)
			ti,omap5430-timer (applicable to OMAP543x devices)
			ti,am335x-timer	(applicable to AM335x devices)
			ti,am335x-timer-1ms (applicable to AM335x devices)

- reg:			Contains timer register address range (base address and
			length).
- interrupts: 		Contains the interrupt information for the timer. The
@@ -22,7 +35,7 @@ Optional properties:
Example:

timer12: timer@48304000 {
	compatible = "ti,omap2-timer";
	compatible = "ti,omap3430-timer";
	reg = <0x48304000 0x400>;
	interrupts = <95>;
	ti,hwmods = "timer12"
+7 −0
Original line number Diff line number Diff line
SAMSUNG S5P/Exynos SoC series System Registers (SYSREG)

Properties:
 - name : should be 'sysreg';
 - compatible : should contain "samsung,<chip name>-sysreg", "syscon";
   For Exynos4 SoC series it should be "samsung,exynos4-sysreg", "syscon";
 - reg : offset and length of the register set.
+45 −4
Original line number Diff line number Diff line
@@ -3,17 +3,58 @@
Required properties:
- compatible : Should be "fsl,<chip>-dma-apbh" or "fsl,<chip>-dma-apbx"
- reg : Should contain registers location and length
- interrupts : Should contain the interrupt numbers of DMA channels.
  If a channel is empty/reserved, 0 should be filled in place.
- #dma-cells : Must be <1>.  The number cell specifies the channel ID.
- dma-channels : Number of channels supported by the DMA controller

Optional properties:
- interrupt-names : Name of DMA channel interrupts

Supported chips:
imx23, imx28.

Examples:
dma-apbh@80004000 {

dma_apbh: dma-apbh@80004000 {
	compatible = "fsl,imx28-dma-apbh";
	reg = <0x80004000 2000>;
	reg = <0x80004000 0x2000>;
	interrupts = <82 83 84 85
		      88 88 88 88
		      88 88 88 88
		      87 86 0 0>;
	interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
			  "gpmi0", "gmpi1", "gpmi2", "gmpi3",
			  "gpmi4", "gmpi5", "gpmi6", "gmpi7",
			  "hsadc", "lcdif", "empty", "empty";
	#dma-cells = <1>;
	dma-channels = <16>;
};

dma-apbx@80024000 {
dma_apbx: dma-apbx@80024000 {
	compatible = "fsl,imx28-dma-apbx";
	reg = <0x80024000 2000>;
	reg = <0x80024000 0x2000>;
	interrupts = <78 79 66 0
		      80 81 68 69
		      70 71 72 73
		      74 75 76 77>;
	interrupt-names = "auart4-rx", "aurat4-tx", "spdif-tx", "empty",
			  "saif0", "saif1", "i2c0", "i2c1",
			  "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",
			  "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";
	#dma-cells = <1>;
	dma-channels = <16>;
};

DMA clients connected to the MXS DMA controller must use the format
described in the dma.txt file.

Examples:

auart0: serial@8006a000 {
	compatible = "fsl,imx28-auart", "fsl,imx23-auart";
	reg = <0x8006a000 0x2000>;
	interrupts = <112>;
	dmas = <&dma_apbx 8>, <&dma_apbx 9>;
	dma-names = "rx", "tx";
};
+33 −3
Original line number Diff line number Diff line
@@ -5,9 +5,16 @@ Required properties:
  imx23 and imx28.
- reg: Address and length of the register set for lcdif
- interrupts: Should contain lcdif interrupts
- display : phandle to display node (see below for details)

Optional properties:
- panel-enable-gpios : Should specify the gpio for panel enable
* display node

Required properties:
- bits-per-pixel : <16> for RGB565, <32> for RGB888/666.
- bus-width : number of data lines.  Could be <8>, <16>, <18> or <24>.

Required sub-node:
- display-timings : Refer to binding doc display-timing.txt for details.

Examples:

@@ -15,5 +22,28 @@ lcdif@80030000 {
	compatible = "fsl,imx28-lcdif";
	reg = <0x80030000 2000>;
	interrupts = <38 86>;
	panel-enable-gpios = <&gpio3 30 0>;

	display: display {
		bits-per-pixel = <32>;
		bus-width = <24>;

		display-timings {
			native-mode = <&timing0>;
			timing0: timing0 {
				clock-frequency = <33500000>;
				hactive = <800>;
				vactive = <480>;
				hfront-porch = <164>;
				hback-porch = <89>;
				hsync-len = <10>;
				vback-porch = <23>;
				vfront-porch = <10>;
				vsync-len = <10>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <1>;
				pixelclk-active = <0>;
			};
		};
	};
};
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