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Commit 2f7a2a79 authored by Jack Steiner's avatar Jack Steiner Committed by Andi Kleen
Browse files

[PATCH] x86-64: - Ignore long SMI interrupts in clock calibration code - update 1 



Add failsafe mechanism to HPET/TSC clock calibration.

	Signed-off-by: default avatarJack Steiner <steiner@sgi.com>

Updated to include failsafe mechanism & additional community feedback.
Patch built on latest 2.6.20-rc4-mm1 tree.

Signed-off-by: default avatarAndi Kleen <ak@suse.de>
parent 6c5806ca

arch/x86_64/kernel/time.c

+7 −2
Original line number Diff line number Diff line
@@ -657,6 +657,7 @@ core_initcall(cpufreq_tsc); 


#define TICK_COUNT 100000000

#define TICK_MIN   5000

#define MAX_READ_RETRIES 5



/*

 * Some platforms take periodic SMI interrupts with 5ms duration. Make sure none
@@ -664,13 +665,17 @@ core_initcall(cpufreq_tsc); 
 */

static void __init read_hpet_tsc(int *hpet, int *tsc)

{

	int tsc1, tsc2, hpet1;

	int tsc1, tsc2, hpet1, retries = 0;

	static int msg;



	do {

		tsc1 = get_cycles_sync();

		hpet1 = hpet_readl(HPET_COUNTER);

		tsc2 = get_cycles_sync();

	} while (tsc2 - tsc1 > TICK_MIN);

	} while (tsc2 - tsc1 > TICK_MIN && retries++ < MAX_READ_RETRIES);

	if (retries >= MAX_READ_RETRIES && !msg++)

		printk(KERN_WARNING

		       "hpet.c: exceeded max retries to read HPET & TSC\n");

	*hpet = hpet1;

	*tsc = tsc2;

}