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Commit 6c5806ca authored by Andreas Herrmann's avatar Andreas Herrmann Committed by Andi Kleen
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[PATCH] i386: fix size_or_mask and size_and_mask



mtrr: fix size_or_mask and size_and_mask

This fixes two bugs in /proc/mtrr interface:
o If physical address size crosses the 44 bit boundary
  size_or_mask is evaluated wrong.
o size_and_mask limits width of physical base
  address for an MTRR to be less than 44 bits.

TBD: later patch had one more change, but I think that was bogus.
TBD: need to double check

Signed-off-by: default avatarAndreas Herrmann <andreas.herrmann3@amd.com>
Signed-off-by: default avatarAndi Kleen <ak@suse.de>
parent 016d6f35
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+3 −3
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@ u32 num_var_ranges = 0;
unsigned int *usage_table;
static DEFINE_MUTEX(mtrr_mutex);

u32 size_or_mask, size_and_mask;
u64 size_or_mask, size_and_mask;

static struct mtrr_ops * mtrr_ops[X86_VENDOR_NUM] = {};

@@ -662,8 +662,8 @@ void __init mtrr_bp_init(void)
			     boot_cpu_data.x86_mask == 0x4))
				phys_addr = 36;

			size_or_mask = ~((1 << (phys_addr - PAGE_SHIFT)) - 1);
			size_and_mask = ~size_or_mask & 0xfff00000;
			size_or_mask = ~((1ULL << (phys_addr - PAGE_SHIFT)) - 1);
			size_and_mask = ~size_or_mask & 0xfffff00000ULL;
		} else if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR &&
			   boot_cpu_data.x86 == 6) {
			/* VIA C* family have Intel style MTRRs, but
+1 −1
Original line number Diff line number Diff line
@@ -84,7 +84,7 @@ void get_mtrr_state(void);

extern void set_mtrr_ops(struct mtrr_ops * ops);

extern u32 size_or_mask, size_and_mask;
extern u64 size_or_mask, size_and_mask;
extern struct mtrr_ops * mtrr_if;

#define is_cpu(vnd)	(mtrr_if && mtrr_if->vendor == X86_VENDOR_##vnd)