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Commit 2cb90799 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "msm: clk: add support for DSI pll on MSM8937"

parents 0940a5a0 c8102fd8

arch/arm/boot/dts/qcom/msm8937.dtsi

+7 −1
Original line number Diff line number Diff line
@@ -563,7 +563,13 @@ 
	};



	clock_gcc_mdss: qcom,gcc-mdss@1800000 {

		compatible = "qcom,dummycc";

		compatible = "qcom,gcc-mdss-8937";

		clocks = <&mdss_dsi0_pll clk_dsi_pll0_pixel_clk_src>,

			 <&mdss_dsi0_pll clk_dsi_pll0_byte_clk_src>,

			 <&mdss_dsi1_pll clk_dsi_pll1_pixel_clk_src>,

			 <&mdss_dsi1_pll clk_dsi_pll1_byte_clk_src>;

		clock-names = "pixel_src", "byte_src", "pclk1_src",

				"byte1_src";

		#clock-cells = <1>;

	};

drivers/clk/msm/mdss/mdss-dsi-pll-28lpm.c

+2 −1
Original line number Diff line number Diff line
@@ -363,7 +363,8 @@ int dsi_pll_clock_register_lpm(struct platform_device *pdev, 
	byte_mux_clk_ops = clk_ops_gen_mux;

	byte_mux_clk_ops.prepare = dsi_pll_mux_prepare;



	if (pll_res->target_id == MDSS_PLL_TARGET_8952) {

	if ((pll_res->target_id == MDSS_PLL_TARGET_8952) ||

		(pll_res->target_id == MDSS_PLL_TARGET_8937)) {

		rc = of_msm_clock_register(pdev->dev.of_node,

			mdss_dsi_pllcc_8916, ARRAY_SIZE(mdss_dsi_pllcc_8916));

		if (rc) {

drivers/clk/msm/mdss/mdss-pll.c

+4 −0
Original line number Diff line number Diff line
@@ -129,6 +129,9 @@ static int mdss_pll_resource_parse(struct platform_device *pdev, 
	if (!strcmp(compatible_stream, "qcom,mdss_dsi_pll_8952")) {

		pll_res->pll_interface_type = MDSS_DSI_PLL_LPM;

		pll_res->target_id = MDSS_PLL_TARGET_8952;

	} else if (!strcmp(compatible_stream, "qcom,mdss_dsi_pll_8937")) {

		pll_res->pll_interface_type = MDSS_DSI_PLL_LPM;

		pll_res->target_id = MDSS_PLL_TARGET_8937;

	} else if (!strcmp(compatible_stream, "qcom,mdss_dsi_pll_8996")) {

		pll_res->pll_interface_type = MDSS_DSI_PLL_8996;

		pll_res->target_id = MDSS_PLL_TARGET_8996;
@@ -372,6 +375,7 @@ static const struct of_device_id mdss_pll_dt_match[] = { 
	{.compatible = "qcom,mdss_hdmi_pll_8996_v2"},

	{.compatible = "qcom,mdss_hdmi_pll_8996_v3"},

	{.compatible = "qcom,mdss_dsi_pll_8952"},

	{.compatible = "qcom,mdss_dsi_pll_8937"},

	{}

};

drivers/clk/msm/mdss/mdss-pll.h

+1 −0
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@ enum { 
enum {

	MDSS_PLL_TARGET_8996,

	MDSS_PLL_TARGET_8952,

	MDSS_PLL_TARGET_8937,

};



#define DFPS_MAX_NUM_OF_FRAME_RATES 10

include/dt-bindings/clock/msm-clocks-8952.h

+4 −0
Original line number Diff line number Diff line
@@ -231,6 +231,10 @@ 
#define clk_ext_pclk0_clk_src			0x087c1612

#define clk_ext_byte0_clk_src			0xfb32f31e



#define clk_dsi_pll0_byte_clk_src		0x44539836

#define clk_dsi_pll0_pixel_clk_src		0x5767c287

#define clk_dsi_pll1_byte_clk_src		0x73e88d02

#define clk_dsi_pll1_pixel_clk_src		0xce233fcf

#define clk_ext_pclk1_clk_src			0x8067c5a3

#define clk_ext_byte1_clk_src			0x585ef6d4

#define clk_byte1_clk_src			0x63c2c955