Loading drivers/clk/msm/clock-gcc-8996.c +1 −0 Original line number Diff line number Diff line Loading @@ -2642,6 +2642,7 @@ static struct branch_clk gcc_ufs_ahb_clk = { }; static struct branch_clk gcc_ufs_axi_clk = { .bcr_reg = GCC_UFS_BCR, .cbcr_reg = GCC_UFS_AXI_CBCR, .has_sibling = 0, .base = &virt_base, Loading include/dt-bindings/clock/msm-clocks-hwio-8996.h +1 −0 Original line number Diff line number Diff line Loading @@ -386,6 +386,7 @@ #define GCC_GP3_CBCR (0x66000) #define GCC_GP3_CMD_RCGR (0x66004) #define GCC_GPLL4_MODE (0x77000) #define GCC_UFS_BCR (0x75000) #define GCC_UFS_AXI_CBCR (0x75008) #define GCC_UFS_AHB_CBCR (0x7500C) #define GCC_UFS_TX_CFG_CBCR (0x75010) Loading Loading
drivers/clk/msm/clock-gcc-8996.c +1 −0 Original line number Diff line number Diff line Loading @@ -2642,6 +2642,7 @@ static struct branch_clk gcc_ufs_ahb_clk = { }; static struct branch_clk gcc_ufs_axi_clk = { .bcr_reg = GCC_UFS_BCR, .cbcr_reg = GCC_UFS_AXI_CBCR, .has_sibling = 0, .base = &virt_base, Loading
include/dt-bindings/clock/msm-clocks-hwio-8996.h +1 −0 Original line number Diff line number Diff line Loading @@ -386,6 +386,7 @@ #define GCC_GP3_CBCR (0x66000) #define GCC_GP3_CMD_RCGR (0x66004) #define GCC_GPLL4_MODE (0x77000) #define GCC_UFS_BCR (0x75000) #define GCC_UFS_AXI_CBCR (0x75008) #define GCC_UFS_AHB_CBCR (0x7500C) #define GCC_UFS_TX_CFG_CBCR (0x75010) Loading