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Commit 27f8227b authored by Jesse Barnes's avatar Jesse Barnes Committed by Keith Packard
Browse files

drm/i915: support 3 pipes on IVB+ 



Well almost anyway.  IVB has 3 planes, pipes, transcoders, and FDI
interfaces, but only 2 pipe PLLs.  So two of the pipes must use the same
pipe timings (e.g. 2 DP plus one other, or two HDMI with the same mode
and one other, etc.).

Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Tested-By: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-By: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: default avatarKeith Packard <keithp@keithp.com>
parent 4c609cb8

drivers/gpu/drm/i915/i915_dma.c

+3 −1
Original line number Diff line number Diff line
@@ -2035,7 +2035,9 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 
	spin_lock_init(&dev_priv->error_lock);

	spin_lock_init(&dev_priv->rps_lock);



	if (IS_MOBILE(dev) || !IS_GEN2(dev))

	if (IS_IVYBRIDGE(dev))

		dev_priv->num_pipe = 3;

	else if (IS_MOBILE(dev) || !IS_GEN2(dev))

		dev_priv->num_pipe = 2;

	else

		dev_priv->num_pipe = 1;

drivers/gpu/drm/i915/i915_drv.h

+2 −2
Original line number Diff line number Diff line
@@ -674,8 +674,8 @@ typedef struct drm_i915_private { 
	/* Panel fitter placement and size for Ironlake+ */

	u32 pch_pf_pos, pch_pf_size;



	struct drm_crtc *plane_to_crtc_mapping[2];

	struct drm_crtc *pipe_to_crtc_mapping[2];

	struct drm_crtc *plane_to_crtc_mapping[3];

	struct drm_crtc *pipe_to_crtc_mapping[3];

	wait_queue_head_t pending_flip_queue;

	bool flip_pending_is_done;

drivers/gpu/drm/i915/intel_display.c

+7 −0
Original line number Diff line number Diff line
@@ -2092,6 +2092,7 @@ static int ironlake_update_plane(struct drm_crtc *crtc, 
	switch (plane) {

	case 0:

	case 1:

	case 2:

		break;

	default:

		DRM_ERROR("Can't update plane %d in SAREA\n", plane);
@@ -2191,6 +2192,10 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, 
	case 0:

	case 1:

		break;

	case 2:

		if (IS_IVYBRIDGE(dev))

			break;

		/* fall through otherwise */

	default:

		DRM_ERROR("no plane for crtc\n");

		return -EINVAL;
@@ -2889,6 +2894,8 @@ static void ironlake_pch_enable(struct drm_crtc *crtc) 
			temp |= (TRANSA_DPLL_ENABLE | TRANSA_DPLLA_SEL);

		else if (pipe == 1 && (temp & TRANSB_DPLL_ENABLE) == 0)

			temp |= (TRANSB_DPLL_ENABLE | TRANSB_DPLLB_SEL);

		else if (pipe == 2 && (temp & TRANSC_DPLL_ENABLE) == 0)

			temp |= (TRANSC_DPLL_ENABLE | TRANSC_DPLLB_SEL);

		I915_WRITE(PCH_DPLL_SEL, temp);

	}

drivers/gpu/drm/i915/intel_dp.c

+1 −1
Original line number Diff line number Diff line
@@ -2215,7 +2215,7 @@ intel_dp_init(struct drm_device *dev, int output_reg) 
				  ironlake_panel_vdd_work);

	}



	intel_encoder->crtc_mask = (1 << 0) | (1 << 1);

	intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);

	connector->interlace_allowed = true;

	connector->doublescan_allowed = 0;

drivers/gpu/drm/i915/intel_hdmi.c

+1 −1
Original line number Diff line number Diff line
@@ -514,7 +514,7 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg) 
	connector->polled = DRM_CONNECTOR_POLL_HPD;

	connector->interlace_allowed = 0;

	connector->doublescan_allowed = 0;

	intel_encoder->crtc_mask = (1 << 0) | (1 << 1);

	intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);



	/* Set up the DDC bus. */

	if (sdvox_reg == SDVOB) {