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Commit 1d86950f authored by Vikram Mulukutla's avatar Vikram Mulukutla Committed by Matt Wagantall
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clk: msm: clock-cpu-8996: Enable additional CPU scaling features



In order to support CPR throttling, enable PLL features
that will ensure that the 8996 CPUs always run off of
the primary PLLs, and the alternal PLLs are configured
to certain frequencies.

1. Enable PLL slewing on the primary PLLs. This allows
the PLLs to transition between L values without having
to turn off the PLL outputs or run the PLL bring up
sequence.

2. Enable the alternate PLLs and set a "safe" rate on
them. HW will switch to the alternate PLL during certain
conditions wherein the current CPR aggregated voltage
is not enough to support a CPU exiting power collapse.

3. Enable auto-clock selection to support the HW
switch in (2) - this will allow HW to select the "safe"
source of GPLL0 (div-2) that is running at 300MHz,
when SW is reconfiguring the alternate PLL.

4. Remove the CBF LFMUX. It was never being used.

Change-Id: I1939b59de7cb04e26288ca69fa4b3fd1c4be1da3
Signed-off-by: default avatarVikram Mulukutla <markivx@codeaurora.org>
parent 34f0d1a0
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