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Commit 0fff1068 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull misc x86 fixes from Peter Anvin.

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86, amd, microcode: Fix error path in apply_microcode_amd()
  x86, fpu: correct the asm constraints for fxsave, unbreak mxcsr.daz
  x86, efi: correct call to free_pages
  x86/iommu/vt-d: Expand interrupt remapping quirk to cover x58 chipset
parents 2cfe6c4a d982057f
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+1 −1
Original line number Diff line number Diff line
@@ -225,7 +225,7 @@ static void low_free(unsigned long size, unsigned long addr)
	unsigned long nr_pages;

	nr_pages = round_up(size, EFI_PAGE_SIZE) / EFI_PAGE_SIZE;
	efi_call_phys2(sys_table->boottime->free_pages, addr, size);
	efi_call_phys2(sys_table->boottime->free_pages, addr, nr_pages);
}

static void find_bits(unsigned long mask, u8 *pos, u8 *size)
+12 −2
Original line number Diff line number Diff line
@@ -196,15 +196,23 @@ static void __init ati_bugs_contd(int num, int slot, int func)
static void __init intel_remapping_check(int num, int slot, int func)
{
	u8 revision;
	u16 device;

	device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
	revision = read_pci_config_byte(num, slot, func, PCI_REVISION_ID);

	/*
	 * Revision 0x13 of this chipset supports irq remapping
	 * but has an erratum that breaks its behavior, flag it as such
 	 * Revision 13 of all triggering devices id in this quirk have
	 * a problem draining interrupts when irq remapping is enabled,
	 * and should be flagged as broken.  Additionally revisions 0x12
	 * and 0x22 of device id 0x3405 has this problem.
	 */
	if (revision == 0x13)
		set_irq_remapping_broken();
	else if ((device == 0x3405) &&
	    ((revision == 0x12) ||
	     (revision == 0x22)))
		set_irq_remapping_broken();

}

@@ -239,6 +247,8 @@ static struct chipset early_qrk[] __initdata = {
	  PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
	{ PCI_VENDOR_ID_INTEL, 0x3403, PCI_CLASS_BRIDGE_HOST,
	  PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
	{ PCI_VENDOR_ID_INTEL, 0x3405, PCI_CLASS_BRIDGE_HOST,
	  PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
	{ PCI_VENDOR_ID_INTEL, 0x3406, PCI_CLASS_BRIDGE_HOST,
	  PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
	{}
+1 −1
Original line number Diff line number Diff line
@@ -116,7 +116,7 @@ static void mxcsr_feature_mask_init(void)

	if (cpu_has_fxsr) {
		memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
		asm volatile("fxsave %0" : : "m" (fx_scratch));
		asm volatile("fxsave %0" : "+m" (fx_scratch));
		mask = fx_scratch.mxcsr_mask;
		if (mask == 0)
			mask = 0x0000ffbf;
+5 −4
Original line number Diff line number Diff line
@@ -220,10 +220,11 @@ int apply_microcode_amd(int cpu)
		return 0;
	}

	if (__apply_microcode_amd(mc_amd))
	if (__apply_microcode_amd(mc_amd)) {
		pr_err("CPU%d: update failed for patch_level=0x%08x\n",
			cpu, mc_amd->hdr.patch_id);
	else
		return -1;
	}
	pr_info("CPU%d: new patch_level=0x%08x\n", cpu,
		mc_amd->hdr.patch_id);