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Commit 0e1f61bb authored by Devesh Jhunjhunwala's avatar Devesh Jhunjhunwala
Browse files

ARM: dts: msm: Update the cpu speedbin for mdmcalifornium 



Update the a7 cpu speedbin entries according to the latest
voltage plan.

Change-Id: Ic4804c775ce27702409c54d30944017786f10324
Signed-off-by: default avatarDevesh Jhunjhunwala <deveshj@codeaurora.org>
parent e5fd6614

arch/arm/boot/dts/qcom/mdmcalifornium.dtsi

+3 −2
Original line number Diff line number Diff line
@@ -203,9 +203,10 @@ 


		qcom,speed0-bin-v0 =

			<         0 RPM_SMD_REGULATOR_LEVEL_NONE>,

			< 400000000 RPM_SMD_REGULATOR_LEVEL_SVS>,

			< 200000000 RPM_SMD_REGULATOR_LEVEL_LOW_SVS>,

			< 384000000 RPM_SMD_REGULATOR_LEVEL_SVS>,

			< 787200000 RPM_SMD_REGULATOR_LEVEL_NOM>,

			<1190400000 RPM_SMD_REGULATOR_LEVEL_TURBO>;

			<1286400000 RPM_SMD_REGULATOR_LEVEL_TURBO>;



		cpu-vdd-supply = <&pmdcalifornium_s5_level_ao>;

		qcom,a7ssmux-opp-store-vcorner = <&CPU0>;