Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 07818d6a authored by Mayank Rana's avatar Mayank Rana
Browse files

dwc3: core: clear DELAYP1TRANS with USB3PIPECTL register 



Commit <fd115e68> ("dwc3: core: Don't perform controller and PHYs
soft reset") removed clearing DELAYP1TRANS. It is recommended to
clear DELAYP1TRANS bit with USB3PIPECTL register which controls USB
controller allowing USB QMP PHY low power transitions.

Change-Id: I54ba694f4c997bf5ecc540cee274e2cb07b77446
Signed-off-by: default avatarMayank Rana <mrana@codeaurora.org>
parent 311cf263

drivers/usb/dwc3/core.c

+5 −0
Original line number Diff line number Diff line
@@ -137,6 +137,7 @@ static int dwc3_init_usb_phys(struct dwc3 *dwc) 
static int dwc3_core_reset(struct dwc3 *dwc)

{

	int		ret;

	u32	reg;



	/* Reset PHYs */

	usb_phy_reset(dwc->usb2_phy);
@@ -150,6 +151,10 @@ static int dwc3_core_reset(struct dwc3 *dwc) 
		return ret;

	}



	reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0));

	reg &= ~DWC3_GUSB3PIPECTL_DELAYP1TRANS;

	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);



	dwc3_notify_event(dwc, DWC3_CONTROLLER_RESET_EVENT, 0);



	dwc3_notify_event(dwc, DWC3_CONTROLLER_POST_RESET_EVENT, 0);