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Commit 06b851d9 authored by Ingo Molnar's avatar Ingo Molnar Committed by H. Peter Anvin
Browse files

x86, mce: unify, prepare 64bit in mce.h 



Prepare mce.h for unification, so that it will build on 32-bit x86
kernels too.

[ Impact: cleanup ]

Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
Signed-off-by: default avatarHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
parent a65d0862

arch/x86/include/asm/mce.h

+12 −18
Original line number Diff line number Diff line 
#ifndef _ASM_X86_MCE_H

#define _ASM_X86_MCE_H



#ifdef __x86_64__



#include <linux/types.h>

#include <asm/ioctls.h>
@@ -10,21 +8,21 @@ 
 * Machine Check support for x86

 */



#define MCG_CTL_P	 (1UL<<8)   /* MCG_CAP register available */

#define MCG_CTL_P	 (1ULL<<8)   /* MCG_CAP register available */

#define MCG_EXT_P	 (1ULL<<9)   /* Extended registers available */

#define MCG_CMCI_P	 (1ULL<<10)  /* CMCI supported */



#define MCG_STATUS_RIPV  (1UL<<0)   /* restart ip valid */

#define MCG_STATUS_EIPV  (1UL<<1)   /* ip points to correct instruction */

#define MCG_STATUS_MCIP  (1UL<<2)   /* machine check in progress */

#define MCG_STATUS_RIPV  (1ULL<<0)   /* restart ip valid */

#define MCG_STATUS_EIPV  (1ULL<<1)   /* ip points to correct instruction */

#define MCG_STATUS_MCIP  (1ULL<<2)   /* machine check in progress */



#define MCI_STATUS_VAL   (1UL<<63)  /* valid error */

#define MCI_STATUS_OVER  (1UL<<62)  /* previous errors lost */

#define MCI_STATUS_UC    (1UL<<61)  /* uncorrected error */

#define MCI_STATUS_EN    (1UL<<60)  /* error enabled */

#define MCI_STATUS_MISCV (1UL<<59)  /* misc error reg. valid */

#define MCI_STATUS_ADDRV (1UL<<58)  /* addr reg. valid */

#define MCI_STATUS_PCC   (1UL<<57)  /* processor context corrupt */

#define MCI_STATUS_VAL   (1ULL<<63)  /* valid error */

#define MCI_STATUS_OVER  (1ULL<<62)  /* previous errors lost */

#define MCI_STATUS_UC    (1ULL<<61)  /* uncorrected error */

#define MCI_STATUS_EN    (1ULL<<60)  /* error enabled */

#define MCI_STATUS_MISCV (1ULL<<59)  /* misc error reg. valid */

#define MCI_STATUS_ADDRV (1ULL<<58)  /* addr reg. valid */

#define MCI_STATUS_PCC   (1ULL<<57)  /* processor context corrupt */



/* Fields are zero when not available */

struct mce {
@@ -82,13 +80,11 @@ struct mce_log { 
#define K8_MCE_THRESHOLD_BANK_5    (MCE_THRESHOLD_BASE + 5 * 9)

#define K8_MCE_THRESHOLD_DRAM_ECC  (MCE_THRESHOLD_BANK_4 + 0)



#endif /* __x86_64__ */



#ifdef __KERNEL__



#ifdef CONFIG_X86_32

extern int mce_disabled;

#else /* CONFIG_X86_32 */

#endif



#include <asm/atomic.h>
@@ -143,8 +139,6 @@ extern void machine_check_poll(enum mcp_flags flags, mce_banks_t *b); 


extern int mce_notify_user(void);



#endif /* !CONFIG_X86_32 */



#ifdef CONFIG_X86_MCE

extern void mcheck_init(struct cpuinfo_x86 *c);

#else