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Commit 0221c3fa authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "clk: msm: clock-mmss-8996: Update the fmax values for MMPLL2 and MMPLL8"

parents e68daa5f e25cdf90

arch/arm/boot/dts/qcom/msm8996-regulator.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -803,7 +803,7 @@ 
					<400000 545000  625000  755000  855000>;



				qcom,corner-frequencies =

					<0 214000000 315000000 500000000

					<0 210000000 300000000 500000000

					 604800000>;



				qcom,cpr-target-quotients =

arch/arm/boot/dts/qcom/msm8996-v2.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -42,8 +42,8 @@ 
	qcom,gfxfreq-corner-v2 =

		<	   0  0  0 >,

		<  125000000  2  4 >,

		<  214000000  2  4 >,

		<  315000000  3  4 >,

		<  210000000  2  4 >,

		<  300000000  3  4 >,

		<  500000000  4  5 >,

		<  604800000  5  7 >;

};

drivers/clk/msm/clock-mmss-8996.c

+8 −8
Original line number Diff line number Diff line
@@ -3280,10 +3280,10 @@ static void msm_mmsscc_8996_v2_fixup(void) 
	mmpll2.vco_tbl = mmpll_gfx_vco;

	mmpll2.num_vco = ARRAY_SIZE(mmpll_gfx_vco),

	mmpll2.c.rate = 0;

	mmpll2.c.fmax[VDD_DIG_LOWER] = 650000000;

	mmpll2.c.fmax[VDD_DIG_LOW] = 650000000;

	mmpll2.c.fmax[VDD_DIG_NOMINAL] = 1300000000;

	mmpll2.c.fmax[VDD_DIG_HIGH] = 1300000000;

	mmpll2.c.fmax[VDD_DIG_LOWER] = 1000000000;

	mmpll2.c.fmax[VDD_DIG_LOW] = 1000000000;

	mmpll2.c.fmax[VDD_DIG_NOMINAL] = 1000000000;

	mmpll2.c.fmax[VDD_DIG_HIGH] = 1000000000;

	mmpll2.no_prepared_reconfig = true;

	mmpll2.c.ops = &clk_ops_alpha_pll;
@@ -3307,10 +3307,10 @@ static void msm_mmsscc_8996_v2_fixup(void) 
	mmpll8.vco_tbl = mmpll_gfx_vco;

	mmpll8.num_vco = ARRAY_SIZE(mmpll_gfx_vco),

	mmpll8.c.rate = 0;

	mmpll8.c.fmax[VDD_DIG_LOWER] = 650000000;

	mmpll8.c.fmax[VDD_DIG_LOW] = 650000000;

	mmpll8.c.fmax[VDD_DIG_NOMINAL] = 1300000000;

	mmpll8.c.fmax[VDD_DIG_HIGH] = 1300000000;

	mmpll8.c.fmax[VDD_DIG_LOWER] = 1000000000;

	mmpll8.c.fmax[VDD_DIG_LOW] = 1000000000;

	mmpll8.c.fmax[VDD_DIG_NOMINAL] = 1000000000;

	mmpll8.c.fmax[VDD_DIG_HIGH] = 1000000000;

	mmpll8.no_prepared_reconfig = true;

	mmpll8.c.ops = &clk_ops_alpha_pll;