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Commit 01e00e4d authored by Odelu Kukatla's avatar Odelu Kukatla
Browse files

clk: msm: clock-gcc: Set post divider for debug mux for MSMGold 



Debug mux post_div needs to be set to 4 in order to measure
the frequency of a clock that has high clock rate correctly,
so update the post divider for MSMGold.

CRs-Fixed: 977413
Change-Id: I60b89bbd563d88c14dbef7c677578e91769b3e37
Signed-off-by: default avatarOdelu Kukatla <okukatla@codeaurora.org>
parent e6b9a719

drivers/clk/msm/clock-gcc-8952.c

+3 −0
Original line number Diff line number Diff line
@@ -4435,6 +4435,9 @@ static int msm_clock_debug_probe(struct platform_device *pdev) 
	clk_ops_debug_mux = clk_ops_gen_mux;

	clk_ops_debug_mux.get_rate = measure_get_rate;



	if (compat_bin2)

		gcc_debug_mux_8937.post_div = 0x3;



	if (!compat_bin && !compat_bin2)

		ret =  of_msm_clock_register(pdev->dev.of_node,

			msm_clocks_measure, ARRAY_SIZE(msm_clocks_measure));