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Commit 01c6680a authored by Thomas Gleixner's avatar Thomas Gleixner Committed by H. Peter Anvin
Browse files

x86, mce: Cleanup MCG definitions 



Decode more magic constants and turn them into symbols.

[ Sort definitions bitwise, introduce MCG_EXT_CNT - HS ]

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
Signed-off-by: default avatarHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
parent ba2d0f2b

arch/x86/include/asm/mce.h

+7 −3
Original line number Diff line number Diff line
@@ -8,9 +8,13 @@ 
 * Machine Check support for x86

 */



#define MCG_BANKCNT_MASK	0xff         /* Number of Banks */

#define MCG_CTL_P		(1ULL<<8)    /* MCG_CAP register available */

#define MCG_EXT_P		(1ULL<<9)    /* Extended registers available */

#define MCG_CMCI_P		(1ULL<<10)   /* CMCI supported */

#define MCG_EXT_CNT_MASK	0xff0000     /* Number of Extended registers */

#define MCG_EXT_CNT_SHIFT	16

#define MCG_EXT_CNT(c)		(((c) & MCG_EXT_CNT_MASK) >> MCG_EXT_CNT_SHIFT)



#define MCG_STATUS_RIPV  (1ULL<<0)   /* restart ip valid */

#define MCG_STATUS_EIPV  (1ULL<<1)   /* ip points to correct instruction */

arch/x86/kernel/cpu/mcheck/mce.c

+3 −2
Original line number Diff line number Diff line
@@ -569,7 +569,8 @@ static int mce_cap_init(void) 
	u64 cap;



	rdmsrl(MSR_IA32_MCG_CAP, cap);

	b = cap & 0xff;



	b = cap & MCG_BANKCNT_MASK;

	printk(KERN_INFO "mce: CPU supports %d MCE banks\n", b);



	if (b > MAX_NR_BANKS) {
@@ -590,7 +591,7 @@ static int mce_cap_init(void) 
	}



	/* Use accurate RIP reporting if available. */

	if ((cap & (1<<9)) && ((cap >> 16) & 0xff) >= 9)

	if ((cap & MCG_EXT_P) && MCG_EXT_CNT(cap) >= 9)

		rip_msr = MSR_IA32_MCG_EIP;



	return 0;