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Commit e7d248f0 authored Dec 26, 2013 by Olof Johansson

Merge tag 'tegra-for-3.14-dmas-resets-rework' of...

Merge tag 'tegra-for-3.14-dmas-resets-rework' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/cleanup

From Stephen Warren:
ARM: tegra: implement common DMA and resets DT bindings

This series converts the Tegra DTs and drivers to use the common/
standard DMA and reset bindings, rather than custom bindings. It also
adds complete documentation for the Tegra clock bindings without
actually changing any binding definitions.

This conversion relies on a few sets of patches in branches from outside
the Tegra tree:

1) A patch to add an DMA channel request API which allows deferred probe
   to be implemented.

2) A patch to implement a common part of the of_xlate function for DMA
   controllers.

3) Some ASoC patches (which in turn rely on (1) above), which support
   deferred probe during DMA channel allocation.

4) The Tegra clock driver changes for 3.14.

Consequently, this branch is based on a merge of all of those external
branches.

In turn, this branch is or will be pulled into a few places that either
rely on features introduced here, or would otherwise conflict with the
patches:

a) Tegra's own for-3.14/powergate and for-4.14/dt branches, to avoid
   conflicts.

b) The DRM tree, which introduces new code that relies on the reset
   controller framework introduced in this branch, and to avoid
   conflicts.

* tag 'tegra-for-3.14-dmas-resets-rework' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux

: (30 commits)
  spi: tegra: checking for ERR_PTR instead of NULL
  ASoC: tegra: update module reset list for Tegra124
  clk: tegra: remove bogus PCIE_XCLK
  clk: tegra: remove legacy reset APIs
  ARM: tegra: remove legacy DMA entries from DT
  ARM: tegra: remove legacy clock entries from DT
  USB: EHCI: tegra: use reset framework
  Input: tegra-kbc - use reset framework
  serial: tegra: convert to standard DMA DT bindings
  serial: tegra: use reset framework
  spi: tegra: convert to standard DMA DT bindings
  spi: tegra: use reset framework
  staging: nvec: use reset framework
  i2c: tegra: use reset framework
  ASoC: tegra: convert to standard DMA DT bindings
  ASoC: tegra: allocate AHUB FIFO during probe() not startup()
  ASoC: tegra: call pm_runtime APIs around register accesses
  ASoC: tegra: use reset framework
  dma: tegra: register as an OF DMA controller
  dma: tegra: use reset framework
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>

parents 1c7af42f 8a0a1af3

Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt

+1 −0

Original line number	Diff line number	Diff line
		@@ -9,6 +9,7 @@ Required properties:
		- compatible : Should contain "nvidia,tegra<chip>-pmc".
		- reg : Offset and length of the register set for the device
		- clocks : Must contain an entry for each entry in clock-names.
		See ../clocks/clock-bindings.txt for details.
		- clock-names : Must include the following entries:
		"pclk" (The Tegra clock of that name),
		"clk32k_in" (The 32KHz clock input to Tegra).

Documentation/devicetree/bindings/clock/nvidia,tegra114-car.txt

+4 −0

Original line number	Diff line number	Diff line
		@@ -15,6 +15,9 @@ Required properties :
		In clock consumers, this cell represents the clock ID exposed by the
		CAR. The assignments may be found in header file
		<dt-bindings/clock/tegra114-car.h>.
		- #reset-cells : Should be 1.
		In clock consumers, this cell represents the bit number in the CAR's
		array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.

		Example SoC include file:

		@@ -23,6 +26,7 @@ Example SoC include file:
		compatible = "nvidia,tegra114-car";
		reg = <0x60006000 0x1000>;
		#clock-cells = <1>;
		#reset-cells = <1>;
		};

		usb@c5004000 {

Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt

+4 −0

Original line number	Diff line number	Diff line
		@@ -15,6 +15,9 @@ Required properties :
		In clock consumers, this cell represents the clock ID exposed by the
		CAR. The assignments may be found in header file
		<dt-bindings/clock/tegra124-car.h>.
		- #reset-cells : Should be 1.
		In clock consumers, this cell represents the bit number in the CAR's
		array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.

		Example SoC include file:

		@@ -23,6 +26,7 @@ Example SoC include file:
		compatible = "nvidia,tegra124-car";
		reg = <0x60006000 0x1000>;
		#clock-cells = <1>;
		#reset-cells = <1>;
		};

		usb@c5004000 {

Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt

+4 −0

Original line number	Diff line number	Diff line
		@@ -15,6 +15,9 @@ Required properties :
		In clock consumers, this cell represents the clock ID exposed by the
		CAR. The assignments may be found in header file
		<dt-bindings/clock/tegra20-car.h>.
		- #reset-cells : Should be 1.
		In clock consumers, this cell represents the bit number in the CAR's
		array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.

		Example SoC include file:

		@@ -23,6 +26,7 @@ Example SoC include file:
		compatible = "nvidia,tegra20-car";
		reg = <0x60006000 0x1000>;
		#clock-cells = <1>;
		#reset-cells = <1>;
		};

		usb@c5004000 {

Documentation/devicetree/bindings/clock/nvidia,tegra30-car.txt

+4 −0

Original line number	Diff line number	Diff line
		@@ -15,6 +15,9 @@ Required properties :
		In clock consumers, this cell represents the clock ID exposed by the
		CAR. The assignments may be found in header file
		<dt-bindings/clock/tegra30-car.h>.
		- #reset-cells : Should be 1.
		In clock consumers, this cell represents the bit number in the CAR's
		array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.

		Example SoC include file:

		@@ -23,6 +26,7 @@ Example SoC include file:
		compatible = "nvidia,tegra30-car";
		reg = <0x60006000 0x1000>;
		#clock-cells = <1>;
		#reset-cells = <1>;
		};

		usb@c5004000 {