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Commit e50b5ac8 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman
Browse files

ARM: dts: marzen: Enable SCIF_CLK frequency and pins 



Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 1781460c

arch/arm/boot/dts/r8a7779-marzen.dts

+13 −0
Original line number Diff line number Diff line
@@ -165,6 +165,9 @@ 
};



&pfc {

	pinctrl-0 = <&scif_clk_pins>;

	pinctrl-names = "default";



	du_pins: du {

		du0 {

			renesas,groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0";
@@ -176,6 +179,11 @@ 
		};

	};



	scif_clk_pins: scif_clk {

		renesas,groups = "scif_clk_b";

		renesas,function = "scif_clk";

	};



	ethernet_pins: ethernet {

		intc {

			renesas,groups = "intc_irq1_b";
@@ -222,6 +230,11 @@ 
	status = "okay";

};



&scif_clk {

	clock-frequency = <14745600>;

	status = "okay";

};



&sdhi0 {

	pinctrl-0 = <&sdhi0_pins>;

	pinctrl-names = "default";