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Commit e2db7071 authored by Damien Lespiau's avatar Damien Lespiau Committed by Daniel Vetter
Browse files

drm/i915/skl: Implement WaCcsTlbPrefetchDisable:skl 



Signed-off-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Reviewed-by: default avatarNick Hoath <nicholas.hoath@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 2caa3b26

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -6209,6 +6209,7 @@ enum skl_disp_power_wells { 


#define GEN9_HALF_SLICE_CHICKEN5	0xe188

#define   GEN9_DG_MIRROR_FIX_ENABLE	(1<<5)

#define   GEN9_CCS_TLB_PREFETCH_ENABLE	(1<<3)



#define GEN8_ROW_CHICKEN		0xe4f0

#define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE	(1<<8)

drivers/gpu/drm/i915/intel_ringbuffer.c

+4 −0
Original line number Diff line number Diff line
@@ -984,6 +984,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) 
	/* WaDisablePartialResolveInVc:skl */

	WA_SET_BIT_MASKED(CACHE_MODE_1, GEN9_PARTIAL_RESOLVE_IN_VC_DISABLE);



	/* WaCcsTlbPrefetchDisable:skl */

	WA_CLR_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN5,

			  GEN9_CCS_TLB_PREFETCH_ENABLE);



	return 0;

}