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Commit 9253c2e5 authored by Damien Lespiau's avatar Damien Lespiau Committed by Daniel Vetter
Browse files

drm/i915/skl: Implement WaSetGAPSunitClckGateDisable 



Let's also take the opportunity the remove the comment telling it's a
pre-prod W/A, it should be obvious from the stepping test.

Signed-off-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Reviewed-by: default avatarNick Hoath <nicholas.hoath@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 45db2194

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -6018,6 +6018,7 @@ enum skl_disp_power_wells { 
#define GEN6_RSTCTL				0x9420



#define GEN8_UCGCTL6				0x9430

#define   GEN8_GAPSUNIT_CLOCK_GATE_DISABLE	(1<<24)

#define   GEN8_SDEUNIT_CLOCK_GATE_DISABLE	(1<<14)



#define GEN6_GFXPAUSE				0xA000

drivers/gpu/drm/i915/intel_pm.c

+2 −1
Original line number Diff line number Diff line
@@ -59,9 +59,10 @@ static void skl_init_clock_gating(struct drm_device *dev) 
	if (INTEL_REVID(dev) == SKL_REVID_A0) {

		/*

		 * WaDisableSDEUnitClockGating:skl

		 * This seems to be a pre-production w/a.

		 * WaSetGAPSunitClckGateDisable:skl

		 */

		I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |

			   GEN8_GAPSUNIT_CLOCK_GATE_DISABLE |

			   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);

	}

}