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Commit 45db2194 authored by Damien Lespiau's avatar Damien Lespiau Committed by Daniel Vetter
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drm/i915/skl: Make the init clock gating function skylake specific 



We'll gather cross-gen9 W/A in a separate function later.

Signed-off-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Reviewed-by: default avatarNick Hoath <nicholas.hoath@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 82ef822e

drivers/gpu/drm/i915/intel_pm.c

+2 −2
Original line number Diff line number Diff line
@@ -52,7 +52,7 @@ 
#define INTEL_RC6p_ENABLE			(1<<1)

#define INTEL_RC6pp_ENABLE			(1<<2)



static void gen9_init_clock_gating(struct drm_device *dev)

static void skl_init_clock_gating(struct drm_device *dev)

{

	struct drm_i915_private *dev_priv = dev->dev_private;
@@ -6419,7 +6419,7 @@ void intel_init_pm(struct drm_device *dev) 
	if (INTEL_INFO(dev)->gen >= 9) {

		skl_setup_wm_latency(dev);



		dev_priv->display.init_clock_gating = gen9_init_clock_gating;

		dev_priv->display.init_clock_gating = skl_init_clock_gating;

		dev_priv->display.update_wm = skl_update_wm;

		dev_priv->display.update_sprite_wm = skl_update_sprite_wm;

	} else if (HAS_PCH_SPLIT(dev)) {