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Commit 32a7ede6 authored by Steven J. Hill's avatar Steven J. Hill Committed by John Crispin
Browse files

MIPS: dsp: Add assembler support for DSP ASEs. 



Newer toolchains support the DSP and DSP Rev2 instructions. This patch
performs a check for that support and adds compiler and assembler
flags for only the files that need use those instructions.

Signed-off-by: default avatarSteven J. Hill <sjhill@mips.com>
Acked-by: default avatarFlorian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4752/


Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
parent f8fa4811

arch/mips/include/asm/mipsregs.h

+36 −17
Original line number Diff line number Diff line
@@ -1155,36 +1155,26 @@ do { \ 
        : "=r" (__res));                                        \

        __res;})



#ifdef HAVE_AS_DSP

#define rddsp(mask)							\

({									\

	unsigned int __res;						\

	unsigned int __dspctl;						\

									\

	__asm__ __volatile__(						\

	"	.set	push				\n"		\

	"	.set	noat				\n"		\

	"	# rddsp $1, %x1				\n"		\

	"	.word	0x7c000cb8 | (%x1 << 16)	\n"		\

	"	move	%0, $1				\n"		\

	"	.set	pop				\n"		\

	: "=r" (__res)							\

	"	rddsp	%0, %x1					\n"	\

	: "=r" (__dspctl)						\

	: "i" (mask));							\

	__res;								\

	__dspctl;							\

})



#define wrdsp(val, mask)						\

do {									\

	__asm__ __volatile__(						\

	"	.set	push					\n"	\

	"	.set	noat					\n"	\

	"	move	$1, %0					\n"	\

	"	# wrdsp $1, %x1					\n"	\

	"	.word	0x7c2004f8 | (%x1 << 11)		\n"	\

	"	.set	pop					\n"	\

	"	wrdsp	%0, %x1					\n"	\

	:								\

	: "r" (val), "i" (mask));					\

} while (0)



#if 0	/* Need DSP ASE capable assembler ... */

#define mflo0() ({ long mflo0; __asm__("mflo %0, $ac0" : "=r" (mflo0)); mflo0;})

#define mflo1() ({ long mflo1; __asm__("mflo %0, $ac1" : "=r" (mflo1)); mflo1;})

#define mflo2() ({ long mflo2; __asm__("mflo %0, $ac2" : "=r" (mflo2)); mflo2;})
@@ -1207,6 +1197,35 @@ do { \ 


#else



#define rddsp(mask)							\

({									\

	unsigned int __res;						\

									\

	__asm__ __volatile__(						\

	"	.set	push				\n"		\

	"	.set	noat				\n"		\

	"	# rddsp $1, %x1				\n"		\

	"	.word	0x7c000cb8 | (%x1 << 16)	\n"		\

	"	move	%0, $1				\n"		\

	"	.set	pop				\n"		\

	: "=r" (__res)							\

	: "i" (mask));							\

	__res;								\

})



#define wrdsp(val, mask)						\

do {									\

	__asm__ __volatile__(						\

	"	.set	push					\n"	\

	"	.set	noat					\n"	\

	"	move	$1, %0					\n"	\

	"	# wrdsp $1, %x1					\n"	\

	"	.word	0x7c2004f8 | (%x1 << 11)		\n"	\

	"	.set	pop					\n"	\

        :								\

	: "r" (val), "i" (mask));					\

} while (0)



#define mfhi0()								\

({									\

	unsigned long __treg;						\

arch/mips/kernel/Makefile

+31 −0
Original line number Diff line number Diff line
@@ -98,4 +98,35 @@ obj-$(CONFIG_HW_PERF_EVENTS) += perf_event_mipsxx.o 


obj-$(CONFIG_JUMP_LABEL)	+= jump_label.o



#

# DSP ASE supported for MIPS32 or MIPS64 Release 2 cores only. It is safe

# to enable DSP assembler support here even if the MIPS Release 2 CPU we

# are targetting does not support DSP because all code-paths making use of

# it properly check that the running CPU *actually does* support these

# instructions.

#

ifeq ($(CONFIG_CPU_MIPSR2), y)

CFLAGS_DSP 			= -DHAVE_AS_DSP



#

# Check if assembler supports DSP ASE

#

ifeq ($(call cc-option-yn,-mdsp), y)

CFLAGS_DSP			+= -mdsp

endif



#

# Check if assembler supports DSP ASE Rev2

#

ifeq ($(call cc-option-yn,-mdspr2), y)

CFLAGS_DSP			+= -mdspr2

endif



CFLAGS_signal.o			= $(CFLAGS_DSP)

CFLAGS_signal32.o		= $(CFLAGS_DSP)

CFLAGS_process.o		= $(CFLAGS_DSP)

CFLAGS_branch.o			= $(CFLAGS_DSP)

CFLAGS_ptrace.o			= $(CFLAGS_DSP)

endif



CPPFLAGS_vmlinux.lds		:= $(KBUILD_CFLAGS)