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Commit 2a2cd521 authored by Mark Brown's avatar Mark Brown
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Merge remote-tracking branches 'regmap/fix/be', 'regmap/fix/doc' and...

Merge remote-tracking branches 'regmap/fix/be', 'regmap/fix/doc' and 'regmap/fix/spmi' into regmap-linus
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+19 −40
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Device-Tree binding for regmap

The endianness mode of CPU & Device scenarios:
Index     Device     Endianness properties
---------------------------------------------------
1         BE         'big-endian'
2         LE         'little-endian'
3	  Native     'native-endian'

For one device driver, which will run in different scenarios above
on different SoCs using the devicetree, we need one way to simplify
this.
Devicetree binding for regmap

Optional properties:
- {big,little,native}-endian: these are boolean properties, if absent
  then the implementation will choose a default based on the device
  being controlled.  These properties are for register values and all
  the buffers only.  Native endian means that the CPU and device have
  the same endianness.

Examples:
Scenario 1 : CPU in LE mode & device in LE mode.
dev: dev@40031000 {
	      compatible = "name";
	      reg = <0x40031000 0x1000>;
	      ...
};
   little-endian,
   big-endian,
   native-endian:	See common-properties.txt for a definition

Scenario 2 : CPU in LE mode & device in BE mode.
dev: dev@40031000 {
	      compatible = "name";
	      reg = <0x40031000 0x1000>;
	      ...
	      big-endian;
};
Note:
Regmap defaults to little-endian register access on MMIO based
devices, this is by far the most common setting. On CPU
architectures that typically run big-endian operating systems
(e.g. PowerPC), registers can be defined as big-endian and must
be marked that way in the devicetree.

Scenario 3 : CPU in BE mode & device in BE mode.
dev: dev@40031000 {
	      compatible = "name";
	      reg = <0x40031000 0x1000>;
	      ...
};
On SoCs that can be operated in both big-endian and little-endian
modes, with a single hardware switch controlling both the endianess
of the CPU and a byteswap for MMIO registers (e.g. many Broadcom MIPS
chips), "native-endian" is used to allow using the same device tree
blob in both cases.

Scenario 4 : CPU in BE mode & device in LE mode.
Examples:
Scenario 1 : a register set in big-endian mode.
dev: dev@40031000 {
	      compatible = "name";
	      compatible = "syscon";
	      reg = <0x40031000 0x1000>;
	      big-endian;
	      ...
	      little-endian;
};
+1 −0
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@@ -13,6 +13,7 @@
#ifndef _REGMAP_INTERNAL_H
#define _REGMAP_INTERNAL_H

#include <linux/device.h>
#include <linux/regmap.h>
#include <linux/fs.h>
#include <linux/list.h>
+3 −1
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@@ -23,6 +23,8 @@
#include <linux/regmap.h>
#include <linux/slab.h>

#include "internal.h"

struct regmap_mmio_context {
	void __iomem *regs;
	unsigned val_bytes;
@@ -246,7 +248,7 @@ static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev,
	ctx->val_bytes = config->val_bits / 8;
	ctx->clk = ERR_PTR(-ENODEV);

	switch (config->reg_format_endian) {
	switch (regmap_get_val_endian(dev, &regmap_mmio, config)) {
	case REGMAP_ENDIAN_DEFAULT:
	case REGMAP_ENDIAN_LITTLE:
#ifdef __LITTLE_ENDIAN
+1 −1
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@@ -142,7 +142,7 @@ static int regmap_spmi_ext_read(void *context,
	while (val_size) {
		len = min_t(size_t, val_size, 8);

		err = spmi_ext_register_readl(context, addr, val, val_size);
		err = spmi_ext_register_readl(context, addr, val, len);
		if (err)
			goto err_out;