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Commit 1a9a3e76 authored by Jason Wessel's avatar Jason Wessel Committed by Ingo Molnar
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kgdb: always use icache flush for sw breakpoints 



On the ppc 4xx architecture the instruction cache must be flushed as
well as the data cache.  This patch just makes it generic for all
architectures where CACHE_FLUSH_IS_SAFE is set to 1.

Signed-off-by: default avatarJason Wessel <jason.wessel@windriver.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 56fb7093

kernel/kgdb.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -591,9 +591,9 @@ static void kgdb_flush_swbreak_addr(unsigned long addr) 
	if (current->mm && current->mm->mmap_cache) {

	if (current->mm && current->mm->mmap_cache) {

		flush_cache_range(current->mm->mmap_cache,

		flush_cache_range(current->mm->mmap_cache,

				  addr, addr + BREAK_INSTR_SIZE);

				  addr, addr + BREAK_INSTR_SIZE);

	} else {

		flush_icache_range(addr, addr + BREAK_INSTR_SIZE);

	}

	}

	/* Force flush instruction cache if it was outside the mm */

	flush_icache_range(addr, addr + BREAK_INSTR_SIZE);

}

}





/*

/*