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Commit f619ddd4 authored by Michael Hennerich's avatar Michael Hennerich Committed by Mike Frysinger
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Blackfin: dpmc: punt unnecessary RTC_ISTAT clearing



The RTC ISTAT bits do not affect wakeups, and the RTC driver already
takes care of clearing this MMR when necessary.  So drop the useless
clearing in the core Blackfin power code.

Signed-off-by: default avatarMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent 39750324
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+0 −24
Original line number Diff line number Diff line
@@ -17,9 +17,6 @@ ENTRY(_sleep_mode)

	call _set_sic_iwr;

	R0 = 0xFFFF (Z);
	call _set_rtc_istat;

	P0.H = hi(PLL_CTL);
	P0.L = lo(PLL_CTL);
	R1 = W[P0](z);
@@ -65,9 +62,6 @@ ENTRY(_hibernate_mode)
	call _set_dram_srfs;
	SSYNC;

	R0 = 0xFFFF (Z);
	call _set_rtc_istat;

	P0.H = hi(VR_CTL);
	P0.L = lo(VR_CTL);

@@ -95,9 +89,6 @@ ENTRY(_sleep_deeper)
	call _set_sic_iwr;
	call _set_dram_srfs;	/* Set SDRAM Self Refresh */

	/* Clear all the interrupts,bits sticky */
	R0 = 0xFFFF (Z);
	call _set_rtc_istat;
	P0.H = hi(PLL_DIV);
	P0.L = lo(PLL_DIV);
	R6 = W[P0](z);
@@ -269,21 +260,6 @@ ENTRY(_set_sic_iwr)
	RTS;
ENDPROC(_set_sic_iwr)

ENTRY(_set_rtc_istat)
#ifndef CONFIG_BF561
	P0.H = hi(RTC_ISTAT);
	P0.L = lo(RTC_ISTAT);
	w[P0] = R0.L;
	SSYNC;
#elif (ANOMALY_05000371)
	nop;
	nop;
	nop;
	nop;
#endif
	RTS;
ENDPROC(_set_rtc_istat)

ENTRY(_test_pll_locked)
	P0.H = hi(PLL_STAT);
	P0.L = lo(PLL_STAT);