Blackfin: unify rotary encoder bitmasks (39750324) · Commits · e / devices / android_kernel_teracube_emerald

arch/blackfin/include/asm/bfin_rotary.h

+73 −1

Original line number	Diff line number	Diff line
		@@ -2,7 +2,7 @@
		* board initialization should put one of these structures into platform_data
		* and place the bfin-rotary onto platform_bus named "bfin-rotary".
		*
		* Copyright 2008 Analog Devices Inc.
		* Copyright 2008-2010 Analog Devices Inc.
		*
		* Licensed under the GPL-2 or later.
		*/
		@@ -40,4 +40,76 @@ struct bfin_rotary_platform_data {
		unsigned short debounce; /* 0..17 */
		unsigned short mode;
		};

		/* CNT_CONFIG bitmasks */
		#define CNTE (1 << 0) /* Counter Enable */
		#define DEBE (1 << 1) /* Debounce Enable */
		#define CDGINV (1 << 4) /* CDG Pin Polarity Invert */
		#define CUDINV (1 << 5) /* CUD Pin Polarity Invert */
		#define CZMINV (1 << 6) /* CZM Pin Polarity Invert */
		#define CNTMODE_SHIFT 8
		#define CNTMODE (0x7 << CNTMODE_SHIFT) /* Counter Operating Mode */
		#define ZMZC (1 << 1) /* CZM Zeroes Counter Enable */
		#define BNDMODE_SHIFT 12
		#define BNDMODE (0x3 << BNDMODE_SHIFT) /* Boundary register Mode */
		#define INPDIS (1 << 15) /* CUG and CDG Input Disable */

		#define CNTMODE_QUADENC (0 << CNTMODE_SHIFT) /* quadrature encoder mode */
		#define CNTMODE_BINENC (1 << CNTMODE_SHIFT) /* binary encoder mode */
		#define CNTMODE_UDCNT (2 << CNTMODE_SHIFT) /* up/down counter mode */
		#define CNTMODE_DIRCNT (4 << CNTMODE_SHIFT) /* direction counter mode */
		#define CNTMODE_DIRTMR (5 << CNTMODE_SHIFT) /* direction timer mode */

		#define BNDMODE_COMP (0 << BNDMODE_SHIFT) /* boundary compare mode */
		#define BNDMODE_ZERO (1 << BNDMODE_SHIFT) /* boundary compare and zero mode */
		#define BNDMODE_CAPT (2 << BNDMODE_SHIFT) /* boundary capture mode */
		#define BNDMODE_AEXT (3 << BNDMODE_SHIFT) /* boundary auto-extend mode */

		/* CNT_IMASK bitmasks */
		#define ICIE (1 << 0) /* Illegal Gray/Binary Code Interrupt Enable */
		#define UCIE (1 << 1) /* Up count Interrupt Enable */
		#define DCIE (1 << 2) /* Down count Interrupt Enable */
		#define MINCIE (1 << 3) /* Min Count Interrupt Enable */
		#define MAXCIE (1 << 4) /* Max Count Interrupt Enable */
		#define COV31IE (1 << 5) /* Bit 31 Overflow Interrupt Enable */
		#define COV15IE (1 << 6) /* Bit 15 Overflow Interrupt Enable */
		#define CZEROIE (1 << 7) /* Count to Zero Interrupt Enable */
		#define CZMIE (1 << 8) /* CZM Pin Interrupt Enable */
		#define CZMEIE (1 << 9) /* CZM Error Interrupt Enable */
		#define CZMZIE (1 << 10) /* CZM Zeroes Counter Interrupt Enable */

		/* CNT_STATUS bitmasks */
		#define ICII (1 << 0) /* Illegal Gray/Binary Code Interrupt Identifier */
		#define UCII (1 << 1) /* Up count Interrupt Identifier */
		#define DCII (1 << 2) /* Down count Interrupt Identifier */
		#define MINCII (1 << 3) /* Min Count Interrupt Identifier */
		#define MAXCII (1 << 4) /* Max Count Interrupt Identifier */
		#define COV31II (1 << 5) /* Bit 31 Overflow Interrupt Identifier */
		#define COV15II (1 << 6) /* Bit 15 Overflow Interrupt Identifier */
		#define CZEROII (1 << 7) /* Count to Zero Interrupt Identifier */
		#define CZMII (1 << 8) /* CZM Pin Interrupt Identifier */
		#define CZMEII (1 << 9) /* CZM Error Interrupt Identifier */
		#define CZMZII (1 << 10) /* CZM Zeroes Counter Interrupt Identifier */

		/* CNT_COMMAND bitmasks */
		#define W1LCNT 0xf /* Load Counter Register */
		#define W1LMIN 0xf0 /* Load Min Register */
		#define W1LMAX 0xf00 /* Load Max Register */
		#define W1ZMONCE (1 << 12) /* Enable CZM Clear Counter Once */

		#define W1LCNT_ZERO (1 << 0) /* write 1 to load CNT_COUNTER with zero */
		#define W1LCNT_MIN (1 << 2) /* write 1 to load CNT_COUNTER from CNT_MIN */
		#define W1LCNT_MAX (1 << 3) /* write 1 to load CNT_COUNTER from CNT_MAX */

		#define W1LMIN_ZERO (1 << 4) /* write 1 to load CNT_MIN with zero */
		#define W1LMIN_CNT (1 << 5) /* write 1 to load CNT_MIN from CNT_COUNTER */
		#define W1LMIN_MAX (1 << 7) /* write 1 to load CNT_MIN from CNT_MAX */

		#define W1LMAX_ZERO (1 << 8) /* write 1 to load CNT_MAX with zero */
		#define W1LMAX_CNT (1 << 9) /* write 1 to load CNT_MAX from CNT_COUNTER */
		#define W1LMAX_MIN (1 << 10) /* write 1 to load CNT_MAX from CNT_MIN */

		/* CNT_DEBOUNCE bitmasks */
		#define DPRESCALE 0xf /* Load Counter Register */

		#endif

arch/blackfin/mach-bf518/include/mach/defBF51x_base.h

+0 −108

Original line number	Diff line number	Diff line
		@@ -1576,114 +1576,6 @@

		#define HOST_COUNT_TIMEOUT 0x7ff /* Host Timeout count */

		/* Bit masks for CNT_CONFIG */

		#define CNTE 0x1 /* Counter Enable */
		#define nCNTE 0x0
		#define DEBE 0x2 /* Debounce Enable */
		#define nDEBE 0x0
		#define CDGINV 0x10 /* CDG Pin Polarity Invert */
		#define nCDGINV 0x0
		#define CUDINV 0x20 /* CUD Pin Polarity Invert */
		#define nCUDINV 0x0
		#define CZMINV 0x40 /* CZM Pin Polarity Invert */
		#define nCZMINV 0x0
		#define CNTMODE 0x700 /* Counter Operating Mode */
		#define ZMZC 0x800 /* CZM Zeroes Counter Enable */
		#define nZMZC 0x0
		#define BNDMODE 0x3000 /* Boundary register Mode */
		#define INPDIS 0x8000 /* CUG and CDG Input Disable */
		#define nINPDIS 0x0

		/* Bit masks for CNT_IMASK */

		#define ICIE 0x1 /* Illegal Gray/Binary Code Interrupt Enable */
		#define nICIE 0x0
		#define UCIE 0x2 /* Up count Interrupt Enable */
		#define nUCIE 0x0
		#define DCIE 0x4 /* Down count Interrupt Enable */
		#define nDCIE 0x0
		#define MINCIE 0x8 /* Min Count Interrupt Enable */
		#define nMINCIE 0x0
		#define MAXCIE 0x10 /* Max Count Interrupt Enable */
		#define nMAXCIE 0x0
		#define COV31IE 0x20 /* Bit 31 Overflow Interrupt Enable */
		#define nCOV31IE 0x0
		#define COV15IE 0x40 /* Bit 15 Overflow Interrupt Enable */
		#define nCOV15IE 0x0
		#define CZEROIE 0x80 /* Count to Zero Interrupt Enable */
		#define nCZEROIE 0x0
		#define CZMIE 0x100 /* CZM Pin Interrupt Enable */
		#define nCZMIE 0x0
		#define CZMEIE 0x200 /* CZM Error Interrupt Enable */
		#define nCZMEIE 0x0
		#define CZMZIE 0x400 /* CZM Zeroes Counter Interrupt Enable */
		#define nCZMZIE 0x0

		/* Bit masks for CNT_STATUS */

		#define ICII 0x1 /* Illegal Gray/Binary Code Interrupt Identifier */
		#define nICII 0x0
		#define UCII 0x2 /* Up count Interrupt Identifier */
		#define nUCII 0x0
		#define DCII 0x4 /* Down count Interrupt Identifier */
		#define nDCII 0x0
		#define MINCII 0x8 /* Min Count Interrupt Identifier */
		#define nMINCII 0x0
		#define MAXCII 0x10 /* Max Count Interrupt Identifier */
		#define nMAXCII 0x0
		#define COV31II 0x20 /* Bit 31 Overflow Interrupt Identifier */
		#define nCOV31II 0x0
		#define COV15II 0x40 /* Bit 15 Overflow Interrupt Identifier */
		#define nCOV15II 0x0
		#define CZEROII 0x80 /* Count to Zero Interrupt Identifier */
		#define nCZEROII 0x0
		#define CZMII 0x100 /* CZM Pin Interrupt Identifier */
		#define nCZMII 0x0
		#define CZMEII 0x200 /* CZM Error Interrupt Identifier */
		#define nCZMEII 0x0
		#define CZMZII 0x400 /* CZM Zeroes Counter Interrupt Identifier */
		#define nCZMZII 0x0

		/* Bit masks for CNT_COMMAND */

		#define W1LCNT 0xf /* Load Counter Register */
		#define W1LMIN 0xf0 /* Load Min Register */
		#define W1LMAX 0xf00 /* Load Max Register */
		#define W1ZMONCE 0x1000 /* Enable CZM Clear Counter Once */
		#define nW1ZMONCE 0x0

		/* Bit masks for CNT_DEBOUNCE */

		#define DPRESCALE 0xf /* Load Counter Register */

		/* CNT_COMMAND bit field options */

		#define W1LCNT_ZERO 0x0001 /* write 1 to load CNT_COUNTER with zero */
		#define W1LCNT_MIN 0x0004 /* write 1 to load CNT_COUNTER from CNT_MIN */
		#define W1LCNT_MAX 0x0008 /* write 1 to load CNT_COUNTER from CNT_MAX */

		#define W1LMIN_ZERO 0x0010 /* write 1 to load CNT_MIN with zero */
		#define W1LMIN_CNT 0x0020 /* write 1 to load CNT_MIN from CNT_COUNTER */
		#define W1LMIN_MAX 0x0080 /* write 1 to load CNT_MIN from CNT_MAX */

		#define W1LMAX_ZERO 0x0100 /* write 1 to load CNT_MAX with zero */
		#define W1LMAX_CNT 0x0200 /* write 1 to load CNT_MAX from CNT_COUNTER */
		#define W1LMAX_MIN 0x0400 /* write 1 to load CNT_MAX from CNT_MIN */

		/* CNT_CONFIG bit field options */

		#define CNTMODE_QUADENC 0x0000 /* quadrature encoder mode */
		#define CNTMODE_BINENC 0x0100 /* binary encoder mode */
		#define CNTMODE_UDCNT 0x0200 /* up/down counter mode */
		#define CNTMODE_DIRCNT 0x0400 /* direction counter mode */
		#define CNTMODE_DIRTMR 0x0500 /* direction timer mode */

		#define BNDMODE_COMP 0x0000 /* boundary compare mode */
		#define BNDMODE_ZERO 0x1000 /* boundary compare and zero mode */
		#define BNDMODE_CAPT 0x2000 /* boundary capture mode */
		#define BNDMODE_AEXT 0x3000 /* boundary auto-extend mode */

		/* Bit masks for SECURE_SYSSWT */

		#define EMUDABL 0x1 /* Emulation Disable. */

arch/blackfin/mach-bf527/include/mach/defBF52x_base.h

+0 −108

Original line number	Diff line number	Diff line
		@@ -1589,114 +1589,6 @@

		#define HOST_COUNT_TIMEOUT 0x7ff /* Host Timeout count */

		/* Bit masks for CNT_CONFIG */

		#define CNTE 0x1 /* Counter Enable */
		#define nCNTE 0x0
		#define DEBE 0x2 /* Debounce Enable */
		#define nDEBE 0x0
		#define CDGINV 0x10 /* CDG Pin Polarity Invert */
		#define nCDGINV 0x0
		#define CUDINV 0x20 /* CUD Pin Polarity Invert */
		#define nCUDINV 0x0
		#define CZMINV 0x40 /* CZM Pin Polarity Invert */
		#define nCZMINV 0x0
		#define CNTMODE 0x700 /* Counter Operating Mode */
		#define ZMZC 0x800 /* CZM Zeroes Counter Enable */
		#define nZMZC 0x0
		#define BNDMODE 0x3000 /* Boundary register Mode */
		#define INPDIS 0x8000 /* CUG and CDG Input Disable */
		#define nINPDIS 0x0

		/* Bit masks for CNT_IMASK */

		#define ICIE 0x1 /* Illegal Gray/Binary Code Interrupt Enable */
		#define nICIE 0x0
		#define UCIE 0x2 /* Up count Interrupt Enable */
		#define nUCIE 0x0
		#define DCIE 0x4 /* Down count Interrupt Enable */
		#define nDCIE 0x0
		#define MINCIE 0x8 /* Min Count Interrupt Enable */
		#define nMINCIE 0x0
		#define MAXCIE 0x10 /* Max Count Interrupt Enable */
		#define nMAXCIE 0x0
		#define COV31IE 0x20 /* Bit 31 Overflow Interrupt Enable */
		#define nCOV31IE 0x0
		#define COV15IE 0x40 /* Bit 15 Overflow Interrupt Enable */
		#define nCOV15IE 0x0
		#define CZEROIE 0x80 /* Count to Zero Interrupt Enable */
		#define nCZEROIE 0x0
		#define CZMIE 0x100 /* CZM Pin Interrupt Enable */
		#define nCZMIE 0x0
		#define CZMEIE 0x200 /* CZM Error Interrupt Enable */
		#define nCZMEIE 0x0
		#define CZMZIE 0x400 /* CZM Zeroes Counter Interrupt Enable */
		#define nCZMZIE 0x0

		/* Bit masks for CNT_STATUS */

		#define ICII 0x1 /* Illegal Gray/Binary Code Interrupt Identifier */
		#define nICII 0x0
		#define UCII 0x2 /* Up count Interrupt Identifier */
		#define nUCII 0x0
		#define DCII 0x4 /* Down count Interrupt Identifier */
		#define nDCII 0x0
		#define MINCII 0x8 /* Min Count Interrupt Identifier */
		#define nMINCII 0x0
		#define MAXCII 0x10 /* Max Count Interrupt Identifier */
		#define nMAXCII 0x0
		#define COV31II 0x20 /* Bit 31 Overflow Interrupt Identifier */
		#define nCOV31II 0x0
		#define COV15II 0x40 /* Bit 15 Overflow Interrupt Identifier */
		#define nCOV15II 0x0
		#define CZEROII 0x80 /* Count to Zero Interrupt Identifier */
		#define nCZEROII 0x0
		#define CZMII 0x100 /* CZM Pin Interrupt Identifier */
		#define nCZMII 0x0
		#define CZMEII 0x200 /* CZM Error Interrupt Identifier */
		#define nCZMEII 0x0
		#define CZMZII 0x400 /* CZM Zeroes Counter Interrupt Identifier */
		#define nCZMZII 0x0

		/* Bit masks for CNT_COMMAND */

		#define W1LCNT 0xf /* Load Counter Register */
		#define W1LMIN 0xf0 /* Load Min Register */
		#define W1LMAX 0xf00 /* Load Max Register */
		#define W1ZMONCE 0x1000 /* Enable CZM Clear Counter Once */
		#define nW1ZMONCE 0x0

		/* Bit masks for CNT_DEBOUNCE */

		#define DPRESCALE 0xf /* Load Counter Register */

		/* CNT_COMMAND bit field options */

		#define W1LCNT_ZERO 0x0001 /* write 1 to load CNT_COUNTER with zero */
		#define W1LCNT_MIN 0x0004 /* write 1 to load CNT_COUNTER from CNT_MIN */
		#define W1LCNT_MAX 0x0008 /* write 1 to load CNT_COUNTER from CNT_MAX */

		#define W1LMIN_ZERO 0x0010 /* write 1 to load CNT_MIN with zero */
		#define W1LMIN_CNT 0x0020 /* write 1 to load CNT_MIN from CNT_COUNTER */
		#define W1LMIN_MAX 0x0080 /* write 1 to load CNT_MIN from CNT_MAX */

		#define W1LMAX_ZERO 0x0100 /* write 1 to load CNT_MAX with zero */
		#define W1LMAX_CNT 0x0200 /* write 1 to load CNT_MAX from CNT_COUNTER */
		#define W1LMAX_MIN 0x0400 /* write 1 to load CNT_MAX from CNT_MIN */

		/* CNT_CONFIG bit field options */

		#define CNTMODE_QUADENC 0x0000 /* quadrature encoder mode */
		#define CNTMODE_BINENC 0x0100 /* binary encoder mode */
		#define CNTMODE_UDCNT 0x0200 /* up/down counter mode */
		#define CNTMODE_DIRCNT 0x0400 /* direction counter mode */
		#define CNTMODE_DIRTMR 0x0500 /* direction timer mode */

		#define BNDMODE_COMP 0x0000 /* boundary compare mode */
		#define BNDMODE_ZERO 0x1000 /* boundary compare and zero mode */
		#define BNDMODE_CAPT 0x2000 /* boundary capture mode */
		#define BNDMODE_AEXT 0x3000 /* boundary auto-extend mode */

		/* Bit masks for SECURE_SYSSWT */

		#define EMUDABL 0x1 /* Emulation Disable. */

arch/blackfin/mach-bf548/include/mach/defBF54x_base.h

+0 −78

Original line number	Diff line number	Diff line
		@@ -1958,57 +1958,6 @@
		#define TRUN6 0x40000000 /* Timer 6 Slave Enable Status */
		#define TRUN7 0x80000000 /* Timer 7 Slave Enable Status */

		/* Bit masks for CNT_CONFIG */

		#define CNTE 0x1 /* Counter Enable */
		#define DEBE 0x2 /* Debounce Enable */
		#define CDGINV 0x10 /* CDG Pin Polarity Invert */
		#define CUDINV 0x20 /* CUD Pin Polarity Invert */
		#define CZMINV 0x40 /* CZM Pin Polarity Invert */
		#define CNTMODE 0x700 /* Counter Operating Mode */
		#define ZMZC 0x800 /* CZM Zeroes Counter Enable */
		#define BNDMODE 0x3000 /* Boundary register Mode */
		#define INPDIS 0x8000 /* CUG and CDG Input Disable */

		/* Bit masks for CNT_IMASK */

		#define ICIE 0x1 /* Illegal Gray/Binary Code Interrupt Enable */
		#define UCIE 0x2 /* Up count Interrupt Enable */
		#define DCIE 0x4 /* Down count Interrupt Enable */
		#define MINCIE 0x8 /* Min Count Interrupt Enable */
		#define MAXCIE 0x10 /* Max Count Interrupt Enable */
		#define COV31IE 0x20 /* Bit 31 Overflow Interrupt Enable */
		#define COV15IE 0x40 /* Bit 15 Overflow Interrupt Enable */
		#define CZEROIE 0x80 /* Count to Zero Interrupt Enable */
		#define CZMIE 0x100 /* CZM Pin Interrupt Enable */
		#define CZMEIE 0x200 /* CZM Error Interrupt Enable */
		#define CZMZIE 0x400 /* CZM Zeroes Counter Interrupt Enable */

		/* Bit masks for CNT_STATUS */

		#define ICII 0x1 /* Illegal Gray/Binary Code Interrupt Identifier */
		#define UCII 0x2 /* Up count Interrupt Identifier */
		#define DCII 0x4 /* Down count Interrupt Identifier */
		#define MINCII 0x8 /* Min Count Interrupt Identifier */
		#define MAXCII 0x10 /* Max Count Interrupt Identifier */
		#define COV31II 0x20 /* Bit 31 Overflow Interrupt Identifier */
		#define COV15II 0x40 /* Bit 15 Overflow Interrupt Identifier */
		#define CZEROII 0x80 /* Count to Zero Interrupt Identifier */
		#define CZMII 0x100 /* CZM Pin Interrupt Identifier */
		#define CZMEII 0x200 /* CZM Error Interrupt Identifier */
		#define CZMZII 0x400 /* CZM Zeroes Counter Interrupt Identifier */

		/* Bit masks for CNT_COMMAND */

		#define W1LCNT 0xf /* Load Counter Register */
		#define W1LMIN 0xf0 /* Load Min Register */
		#define W1LMAX 0xf00 /* Load Max Register */
		#define W1ZMONCE 0x1000 /* Enable CZM Clear Counter Once */

		/* Bit masks for CNT_DEBOUNCE */

		#define DPRESCALE 0xf /* Load Counter Register */

		/* Bit masks for SECURE_SYSSWT */

		#define EMUDABL 0x1 /* Emulation Disable. */
		@@ -2412,33 +2361,6 @@
		#define BCODE_QUICKBOOT 0x0020 /* always perform quick boot */
		#define BCODE_NOBOOT 0x0030 /* always perform full boot */

		/* CNT_COMMAND bit field options */

		#define W1LCNT_ZERO 0x0001 /* write 1 to load CNT_COUNTER with zero */
		#define W1LCNT_MIN 0x0004 /* write 1 to load CNT_COUNTER from CNT_MIN */
		#define W1LCNT_MAX 0x0008 /* write 1 to load CNT_COUNTER from CNT_MAX */

		#define W1LMIN_ZERO 0x0010 /* write 1 to load CNT_MIN with zero */
		#define W1LMIN_CNT 0x0020 /* write 1 to load CNT_MIN from CNT_COUNTER */
		#define W1LMIN_MAX 0x0080 /* write 1 to load CNT_MIN from CNT_MAX */

		#define W1LMAX_ZERO 0x0100 /* write 1 to load CNT_MAX with zero */
		#define W1LMAX_CNT 0x0200 /* write 1 to load CNT_MAX from CNT_COUNTER */
		#define W1LMAX_MIN 0x0400 /* write 1 to load CNT_MAX from CNT_MIN */

		/* CNT_CONFIG bit field options */

		#define CNTMODE_QUADENC 0x0000 /* quadrature encoder mode */
		#define CNTMODE_BINENC 0x0100 /* binary encoder mode */
		#define CNTMODE_UDCNT 0x0200 /* up/down counter mode */
		#define CNTMODE_DIRCNT 0x0400 /* direction counter mode */
		#define CNTMODE_DIRTMR 0x0500 /* direction timer mode */

		#define BNDMODE_COMP 0x0000 /* boundary compare mode */
		#define BNDMODE_ZERO 0x1000 /* boundary compare and zero mode */
		#define BNDMODE_CAPT 0x2000 /* boundary capture mode */
		#define BNDMODE_AEXT 0x3000 /* boundary auto-extend mode */

		/* TMODE in TIMERx_CONFIG bit field options */

		#define PWM_OUT 0x0001