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Commit d39d5c2c authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amd/powerplay: add atomctrl function to calculate CZ sclk dividers



Use atombios to calculate the values.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 92b05d82
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+22 −0
Original line number Diff line number Diff line
@@ -313,6 +313,28 @@ int atomctrl_get_memory_pll_dividers_vi(struct pp_hwmgr *hwmgr,
	return result;
}

int atomctrl_get_engine_pll_dividers_kong(struct pp_hwmgr *hwmgr,
					  uint32_t clock_value,
					  pp_atomctrl_clock_dividers_kong *dividers)
{
	COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 pll_parameters;
	int result;

	pll_parameters.ulClock = clock_value;

	result = cgs_atom_exec_cmd_table
		(hwmgr->device,
		 GetIndexIntoMasterTable(COMMAND, ComputeMemoryEnginePLL),
		 &pll_parameters);

	if (0 == result) {
		dividers->pll_post_divider = pll_parameters.ucPostDiv;
		dividers->real_clock = pll_parameters.ulClock;
	}

	return result;
}

int atomctrl_get_engine_pll_dividers_vi(
		struct pp_hwmgr *hwmgr,
		uint32_t clock_value,
+3 −0
Original line number Diff line number Diff line
@@ -233,6 +233,9 @@ extern bool atomctrl_is_voltage_controled_by_gpio_v3(struct pp_hwmgr *hwmgr, uin
extern int atomctrl_get_voltage_table_v3(struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint8_t voltage_mode, pp_atomctrl_voltage_table *voltage_table);
extern int atomctrl_get_memory_pll_dividers_vi(struct pp_hwmgr *hwmgr,
		uint32_t clock_value, pp_atomctrl_memory_clock_param *mpll_param);
extern int atomctrl_get_engine_pll_dividers_kong(struct pp_hwmgr *hwmgr,
						 uint32_t clock_value,
						 pp_atomctrl_clock_dividers_kong *dividers);
extern int atomctrl_read_efuse(void *device, uint16_t start_index,
		uint16_t end_index, uint32_t mask, uint32_t *efuse);
extern int atomctrl_calculate_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_type,