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Commit b2af8092 authored by Tomi Valkeinen's avatar Tomi Valkeinen
Browse files

drm/omap: HDMI: fix WP timings for ilace 



The HDMI WP timings are not programmed correctly for interlace.

We need to halve the vertical timings when interlace is used, and double
the horizontal timings when pixel doubling is used.

Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
parent c92e8727

drivers/gpu/drm/omapdrm/dss/hdmi_wp.c

+16 −2
Original line number Original line Diff line number Diff line
@@ -199,8 +199,6 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt, 
	video_fmt->packing_mode = HDMI_PACK_10b_RGB_YUV444;

	video_fmt->packing_mode = HDMI_PACK_10b_RGB_YUV444;

	video_fmt->y_res = param->timings.y_res;

	video_fmt->y_res = param->timings.y_res;

	video_fmt->x_res = param->timings.x_res;

	video_fmt->x_res = param->timings.x_res;

	if (param->timings.interlace)

		video_fmt->y_res /= 2;





	timings->hbp = param->timings.hbp;

	timings->hbp = param->timings.hbp;

	timings->hfp = param->timings.hfp;

	timings->hfp = param->timings.hfp;
@@ -208,9 +206,25 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt, 
	timings->vbp = param->timings.vbp;

	timings->vbp = param->timings.vbp;

	timings->vfp = param->timings.vfp;

	timings->vfp = param->timings.vfp;

	timings->vsw = param->timings.vsw;

	timings->vsw = param->timings.vsw;



	timings->vsync_level = param->timings.vsync_level;

	timings->vsync_level = param->timings.vsync_level;

	timings->hsync_level = param->timings.hsync_level;

	timings->hsync_level = param->timings.hsync_level;

	timings->interlace = param->timings.interlace;

	timings->interlace = param->timings.interlace;

	timings->double_pixel = param->timings.double_pixel;



	if (param->timings.interlace) {

		video_fmt->y_res /= 2;

		timings->vbp /= 2;

		timings->vfp /= 2;

		timings->vsw /= 2;

	}



	if (param->timings.double_pixel) {

		video_fmt->x_res *= 2;

		timings->hfp *= 2;

		timings->hsw *= 2;

		timings->hbp *= 2;

	}

}

}





void hdmi_wp_audio_config_format(struct hdmi_wp_data *wp,

void hdmi_wp_audio_config_format(struct hdmi_wp_data *wp,