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Commit a57f14ba authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mmc-v4.2' of git://git.linaro.org/people/ulf.hansson/mmc 

Pull MMC updates from Ulf Hansson:
 "Here are the changes for MMC for v4.2.

  MMC core:
   - Fix an error path in the mmc block layer
   - Fix PM domain attachment for the SDIO bus
   - Add support for driver strength selection
   - Increase a delay to let voltage stabilize
   - Add support for disabling write-protect detection
   - Add facility to support re-tuning
   - Re-tune and retry in the recovery path
   - Add reset option for SDIO
   - Consolidations and clean-ups

  MMC host:
   - Add Mediatek MMC driver
   - Constify platform_device_id for a couple of hosts
   - Fix modalias to make module auto-loading work for a couple of hosts
   - sdhci: Add support for sdhci-arasan4.9a
   - sdhci: Fix low memory corruption
   - sdhci: Restore behavior while creating OCR mask
   - sdhci: Add a callback to select drive strength
   - sdhci: Fix driver type B and D handling
   - sdhci: Add support for drive strength selection for SPT
   - sdhci: Enable HS400 for some Intel host controllers
   - sdhci: Convert to use the new re-tuning facility
   - sdhci: Various minor fixes and clean-ups
   - dw_mmc: Add support for hi6220
   - dw_mmc: Use core to handle absent write protect line
   - dw_mmc: Add support to switch voltage
   - tmio: Some fixes and modernizations
   - sh_mmcif: Improve clock rate calculation"

* tag 'mmc-v4.2' of git://git.linaro.org/people/ulf.hansson/mmc: (98 commits)
  mmc: queue: prevent soft lockups on PREEMPT=n
  mmc: mediatek: Add PM support for MMC driver
  mmc: mediatek: Add Mediatek MMC driver
  mmc: dt-bindings: add Mediatek MMC bindings
  mmc: card: Fixup request missing in mmc_blk_issue_rw_rq
  mmc: sdhci: fix low memory corruption
  mmc: sdhci-pci: Change AMD SDHCI quirk application scope
  i2c-piix4: Use Macro for AMD CZ SMBus device ID
  pci_ids: Add AMD KERNCZ device ID support
  mmc: queue: use swap() in mmc_queue_thread()
  mmc: dw_mmc: insmod followed by rmmod will hung for eMMC
  mmc: sdhci: Restore behavior while creating OCR mask
  mmc: sdhci-pxav3: fix device wakeup initialization
  mmc: core: Attach PM domain prior probing of SDIO func driver
  mmc: core: Remove redundant ->power_restore() callback for SD
  mmc: core: Remove redundant ->power_restore() callback for MMC
  mmc: sdhci-bcm2835: Actually enable the clock
  mmc: sdhci-bcm2835: Clean up platform allocations if sdhci init fails.
  mmc: sdhci-of-esdhc: enable interrupt mode to detect card
  mmc: sdhci-esdhc-imx: add quirk SDHCI_QUIRK2_BROKEN_HS200 for imx6qdl
  ...
parents 10b4b096 a8c27c0b

Documentation/devicetree/bindings/mmc/arasan,sdhci.txt

+2 −1
Original line number Diff line number Diff line
@@ -8,7 +8,8 @@ Device Tree Bindings for the Arasan SDHCI Controller 
  [3] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt



Required Properties:

  - compatible: Compatibility string. Must be 'arasan,sdhci-8.9a'

  - compatible: Compatibility string. Must be 'arasan,sdhci-8.9a' or

                'arasan,sdhci-4.9a'

  - reg: From mmc bindings: Register location and length.

  - clocks: From clock bindings: Handles to clock inputs.

  - clock-names: From clock bindings: Tuple including "clk_xin" and "clk_ahb"

Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt

+8 −1
Original line number Diff line number Diff line
@@ -7,7 +7,14 @@ This file documents differences between the core properties described 
by mmc.txt and the properties used by the sdhci-esdhc-imx driver.



Required properties:

- compatible : Should be "fsl,<chip>-esdhc"

- compatible : Should be "fsl,<chip>-esdhc", the supported chips include

	       "fsl,imx25-esdhc"

	       "fsl,imx35-esdhc"

	       "fsl,imx51-esdhc"

	       "fsl,imx53-esdhc"

	       "fsl,imx6q-usdhc"

	       "fsl,imx6sl-usdhc"

	       "fsl,imx6sx-usdhc"



Optional properties:

- fsl,cd-controller : Indicate to use controller internal card detection

Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt

+28 −0
Original line number Diff line number Diff line
@@ -13,6 +13,10 @@ Required Properties: 


* compatible: should be one of the following.

  - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions.

  - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions.



Optional Properties:

- hisilicon,peripheral-syscon: phandle of syscon used to control peripheral.



Example:
@@ -42,3 +46,27 @@ Example: 
		cap-mmc-highspeed;

		cap-sd-highspeed;

	};



	/* for Hi6220 */



	dwmmc_1: dwmmc1@f723e000 {

		compatible = "hisilicon,hi6220-dw-mshc";

		num-slots = <0x1>;

		bus-width = <0x4>;

		disable-wp;

		cap-sd-highspeed;

		sd-uhs-sdr12;

		sd-uhs-sdr25;

		card-detect-delay = <200>;

		hisilicon,peripheral-syscon = <&ao_ctrl>;

		reg = <0x0 0xf723e000 0x0 0x1000>;

		interrupts = <0x0 0x49 0x4>;

		clocks = <&clock_sys HI6220_MMC1_CIUCLK>, <&clock_sys HI6220_MMC1_CLK>;

		clock-names = "ciu", "biu";

		cd-gpios = <&gpio1 0 1>;

		pinctrl-names = "default", "idle";

		pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>;

		pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>;

		vqmmc-supply = <&ldo7>;

		vmmc-supply = <&ldo10>;

	};

Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt

+3 −1
Original line number Diff line number Diff line
@@ -21,5 +21,7 @@ Example: 


	sdhci0_pwrseq {

		compatible = "mmc-pwrseq-simple";

		reset-gpios = <&gpio1 12 0>;

		reset-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;

		clocks = <&clk_32768_ck>;

		clock-names = "ext_clock";

	}

Documentation/devicetree/bindings/mmc/mmc.txt

+5 −0
Original line number Diff line number Diff line
@@ -21,6 +21,11 @@ Optional properties: 
  below for the case, when a GPIO is used for the CD line

- wp-inverted: when present, polarity on the WP line is inverted. See the note

  below for the case, when a GPIO is used for the WP line

- disable-wp: When set no physical WP line is present. This property should

  only be specified when the controller has a dedicated write-protect

  detection logic. If a GPIO is always used for the write-protect detection

  logic it is sufficient to not specify wp-gpios property in the absence of a WP

  line.

- max-frequency: maximum operating clock frequency

- no-1-8-v: when present, denotes that 1.8v card voltage is not supported on

  this system, even if the controller claims it is.