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Commit 10b4b096 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'gpio-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio 

Pull gpio updates from Linus Walleij:
 "This is the big bulk of GPIO changes queued for the v4.2 kernel
  series:

   - a big set of cleanups to the aged sysfs interface from Johan
     Hovold.  To get these in, v4.1-rc3 was merged into the tree as the
     first patch in that series had to go into stable.  This makes the
     locking much more fine-grained (get rid of the "big GPIO lock(s)"
     and store states in the GPIO descriptors.

   - rename gpiod_[g|s]et_array() to gpiod_[g|s]et_array_value() to
     avoid confusions.

   - New drivers for:
      * NXP LPC18xx (currently LPC1850)
      * NetLogic XLP
      * Broadcom STB SoC's
      * Axis ETRAXFS
      * Zynq Ultrascale+ (subdriver)

   - ACPI:
      * make it possible to retrieve GpioInt resources from a GPIO
        device using acpi_dev_gpio_irq_get()
      * merge some dependent I2C changes exploiting this.
      * support the ARM X-Gene GPIO standby driver.

   - make it possible for the generic GPIO driver to read back the value
     set registers to reflect current status.

   - loads of OMAP IRQ handling fixes.

   - incremental improvements to Kona, max732x, OMAP, MXC, RCAR,
     PCA953x, STP-XWAY, PCF857x, Crystalcove, TB10x.

   - janitorial (constification, checkpatch cleanups)"

* tag 'gpio-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (71 commits)
  gpio: Fix checkpatch.pl issues
  gpio: pcf857x: handle only enabled irqs
  gpio / ACPI: Return -EPROBE_DEFER if the gpiochip was not found
  GPIO / ACPI: export acpi_gpiochip_request(free)_interrupts for module use
  gpio: improve error reporting on own descriptors
  gpio: promote own request failure to pr_err()
  gpio: Added support to Zynq Ultrascale+ MPSoC
  gpio: add ETRAXFS GPIO driver
  fix documentation after renaming gpiod_set_array to gpiod_set_array_value
  gpio: Add GPIO support for Broadcom STB SoCs
  gpio: xgene: add ACPI support for APM X-Gene GPIO standby driver
  gpio: tb10x: Drop unneeded free_irq() call
  gpio: crystalcove: set IRQCHIP_SKIP_SET_WAKE for the irqchip
  gpio: stp-xway: Use the of_property_read_u32 helper
  gpio: pcf857x: Check for irq_set_irq_wake() failures
  gpio-stp-xway: Fix enabling the highest bit of the PHY LEDs
  gpio: Prevent an integer overflow in the pca953x driver
  gpio: omap: rework omap_gpio_irq_startup to handle current pin state properly
  gpio: omap: rework omap_gpio_request to touch only gpio specific registers
  gpio: omap: rework omap_x_irq_shutdown to touch only irqs specific registers
  ...
parents c70c5fb2 38e003f4

Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.txt

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Broadcom STB "UPG GIO" GPIO controller



The controller's registers are organized as sets of eight 32-bit

registers with each set controlling a bank of up to 32 pins.  A single

interrupt is shared for all of the banks handled by the controller.



Required properties:



- compatible:

    Must be "brcm,brcmstb-gpio"



- reg:

    Define the base and range of the I/O address space containing

    the brcmstb GPIO controller registers



- #gpio-cells:

    Should be <2>.  The first cell is the pin number (within the controller's

    pin space), and the second is used for the following:

    bit[0]: polarity (0 for active-high, 1 for active-low)



- gpio-controller:

    Specifies that the node is a GPIO controller.



- brcm,gpio-bank-widths:

    Number of GPIO lines for each bank.  Number of elements must

    correspond to number of banks suggested by the 'reg' property.



Optional properties:



- interrupts:

    The interrupt shared by all GPIO lines for this controller.



- interrupt-parent:

    phandle of the parent interrupt controller



- #interrupt-cells:

    Should be <2>.  The first cell is the GPIO number, the second should specify

    flags.  The following subset of flags is supported:

    - bits[3:0] trigger type and level flags

        1 = low-to-high edge triggered

        2 = high-to-low edge triggered

        4 = active high level-sensitive

        8 = active low level-sensitive

      Valid combinations are 1, 2, 3, 4, 8.

    See also Documentation/devicetree/bindings/interrupt-controller/interrupts.txt



- interrupt-controller:

    Marks the device node as an interrupt controller



- interrupt-names:

    The name of the IRQ resource used by this controller



Example:

	upg_gio: gpio@f040a700 {

		#gpio-cells = <0x2>;

		#interrupt-cells = <0x2>;

		compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio";

		gpio-controller;

		interrupt-controller;

		reg = <0xf040a700 0x80>;

		interrupt-parent = <0xf>;

		interrupts = <0x6>;

		interrupt-names = "upg_gio";

		brcm,gpio-bank-widths = <0x20 0x20 0x20 0x18>;

	};

Documentation/devicetree/bindings/gpio/gpio-etraxfs.txt

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Axis ETRAX FS General I/O controller bindings



Required properties:



- compatible:

  - "axis,etraxfs-gio"

- reg: Physical base address and length of the controller's registers.

- #gpio-cells: Should be 3

  - The first cell is the gpio offset number.

  - The second cell is reserved and is currently unused.

  - The third cell is the port number (hex).

- gpio-controller: Marks the device node as a GPIO controller.



Example:



	gio: gpio@b001a000 {

		compatible = "axis,etraxfs-gio";

		reg = <0xb001a000 0x1000>;

		gpio-controller;

		#gpio-cells = <3>;

	};

Documentation/devicetree/bindings/gpio/gpio-xlp.txt

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Netlogic XLP Family GPIO

========================



This GPIO driver is used for following Netlogic XLP SoCs:

	XLP832, XLP316, XLP208, XLP980, XLP532



Required properties:

-------------------



- compatible: Should be one of the following:

  - "netlogic,xlp832-gpio": For Netlogic XLP832

  - "netlogic,xlp316-gpio": For Netlogic XLP316

  - "netlogic,xlp208-gpio": For Netlogic XLP208

  - "netlogic,xlp980-gpio": For Netlogic XLP980

  - "netlogic,xlp532-gpio": For Netlogic XLP532

- reg: Physical base address and length of the controller's registers.

- #gpio-cells: Should be two. The first cell is the pin number and the second

  cell is used to specify optional parameters (currently unused).

- gpio-controller: Marks the device node as a GPIO controller.

- nr-gpios: Number of GPIO pins supported by the controller.

- interrupt-cells: Should be two. The first cell is the GPIO Number. The

  second cell is used to specify flags. The following subset of flags is

  supported:

  - trigger type:

	1 = low to high edge triggered.

	2 = high to low edge triggered.

	4 = active high level-sensitive.

	8 = active low level-sensitive.

- interrupts: Interrupt number for this device.

- interrupt-parent: phandle of the parent interrupt controller.

- interrupt-controller: Identifies the node as an interrupt controller.



Example:



	gpio: xlp_gpio@34000 {

		compatible = "netlogic,xlp316-gpio";

		reg = <0 0x34100 0x1000

		       0 0x35100 0x1000>;

		#gpio-cells = <2>;

		gpio-controller;

		nr-gpios = <57>;



		#interrupt-cells = <2>;

		interrupt-parent = <&pic>;

		interrupts = <39>;

		interrupt-controller;

	};

Documentation/devicetree/bindings/gpio/gpio-zynq.txt

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@@ -6,7 +6,7 @@ Required properties: 
			  - First cell is the GPIO line number

			  - Second cell is used to specify optional

			    parameters (unused)

- compatible		: Should be "xlnx,zynq-gpio-1.0"

- compatible		: Should be "xlnx,zynq-gpio-1.0" or "xlnx,zynqmp-gpio-1.0"

- clocks		: Clock specifier (see clock bindings for details)

- gpio-controller	: Marks the device node as a GPIO controller.

- interrupts		: Interrupt specifier (see interrupt bindings for

Documentation/devicetree/bindings/gpio/nxp,lpc1850-gpio.txt

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NXP LPC18xx/43xx GPIO controller Device Tree Bindings

-----------------------------------------------------



Required properties:

- compatible		: Should be "nxp,lpc1850-gpio"

- reg			: Address and length of the register set for the device

- clocks		: Clock specifier (see clock bindings for details)

- gpio-controller	: Marks the device node as a GPIO controller.

- #gpio-cells 		: Should be two

			  - First cell is the GPIO line number

			  - Second cell is used to specify polarity



Optional properties:

- gpio-ranges		: Mapping between GPIO and pinctrl



Example:

#define LPC_GPIO(port, pin)	(port * 32 + pin)

#define LPC_PIN(port, pin)	(0x##port * 32 + pin)



gpio: gpio@400f4000 {

	compatible = "nxp,lpc1850-gpio";

	reg = <0x400f4000 0x4000>;

	clocks = <&ccu1 CLK_CPU_GPIO>;

	gpio-controller;

	#gpio-cells = <2>;

	gpio-ranges =	<&pinctrl LPC_GPIO(0,0)  LPC_PIN(0,0)  2>,

			...

			<&pinctrl LPC_GPIO(7,19) LPC_PIN(f,5)  7>;

};



gpio_joystick {

	compatible = "gpio-keys-polled";

	...



	button@0 {

		...

		gpios = <&gpio LPC_GPIO(4,8) GPIO_ACTIVE_LOW>;

	};

};